273 lines
8.6 KiB
Plaintext
273 lines
8.6 KiB
Plaintext
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=aarch64-- -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
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---
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name: cmp_imm_32
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1:
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liveins: $w0
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; CHECK-LABEL: name: cmp_imm_32
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; CHECK: liveins: $w0
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; CHECK: [[COPY:%[0-9]+]]:gpr32sp = COPY $w0
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; CHECK: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 42, 0, implicit-def $nzcv
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; CHECK: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 1, implicit $nzcv
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; CHECK: $w0 = COPY [[CSINCWr]]
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; CHECK: RET_ReallyLR implicit $w0
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%0:gpr(s32) = COPY $w0
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%1:gpr(s32) = G_CONSTANT i32 42
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%5:gpr(s32) = G_ICMP intpred(eq), %0(s32), %1
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$w0 = COPY %5(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: cmp_imm_64
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1:
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liveins: $x0
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; CHECK-LABEL: name: cmp_imm_64
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; CHECK: liveins: $x0
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; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
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; CHECK: [[SUBSXri:%[0-9]+]]:gpr64 = SUBSXri [[COPY]], 42, 0, implicit-def $nzcv
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; CHECK: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 1, implicit $nzcv
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; CHECK: $w0 = COPY [[CSINCWr]]
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; CHECK: RET_ReallyLR implicit $w0
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%0:gpr(s64) = COPY $x0
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%1:gpr(s64) = G_CONSTANT i64 42
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%5:gpr(s32) = G_ICMP intpred(eq), %0(s64), %1
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$w0 = COPY %5(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: cmp_imm_out_of_range
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1:
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liveins: $x0
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; CHECK-LABEL: name: cmp_imm_out_of_range
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; CHECK: liveins: $x0
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; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
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; CHECK: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 13132
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; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64 = SUBREG_TO_REG 0, [[MOVi32imm]], %subreg.sub_32
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; CHECK: [[SUBSXrr:%[0-9]+]]:gpr64 = SUBSXrr [[COPY]], [[SUBREG_TO_REG]], implicit-def $nzcv
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; CHECK: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 1, implicit $nzcv
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; CHECK: $w0 = COPY [[CSINCWr]]
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; CHECK: RET_ReallyLR implicit $w0
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%0:gpr(s64) = COPY $x0
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%1:gpr(s64) = G_CONSTANT i64 13132
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%5:gpr(s32) = G_ICMP intpred(eq), %0(s64), %1
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$w0 = COPY %5(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: cmp_imm_lookthrough
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1:
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liveins: $w0
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; CHECK-LABEL: name: cmp_imm_lookthrough
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; CHECK: liveins: $w0
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; CHECK: [[COPY:%[0-9]+]]:gpr32sp = COPY $w0
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; CHECK: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 42, 0, implicit-def $nzcv
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; CHECK: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 1, implicit $nzcv
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; CHECK: $w0 = COPY [[CSINCWr]]
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; CHECK: RET_ReallyLR implicit $w0
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%0:gpr(s32) = COPY $w0
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%1:gpr(s64) = G_CONSTANT i64 42
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%2:gpr(s32) = G_TRUNC %1(s64)
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%5:gpr(s32) = G_ICMP intpred(eq), %0(s32), %2
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$w0 = COPY %5(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: cmp_imm_lookthrough_bad_trunc
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1:
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liveins: $w0
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; CHECK-LABEL: name: cmp_imm_lookthrough_bad_trunc
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; CHECK: liveins: $w0
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; CHECK: [[COPY:%[0-9]+]]:gpr32sp = COPY $w0
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; CHECK: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 0, 0, implicit-def $nzcv
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; CHECK: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 1, implicit $nzcv
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; CHECK: $w0 = COPY [[CSINCWr]]
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; CHECK: RET_ReallyLR implicit $w0
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%0:gpr(s32) = COPY $w0
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%1:gpr(s64) = G_CONSTANT i64 68719476736 ; 0x1000000000
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%2:gpr(s32) = G_TRUNC %1(s64) ; Value truncates to 0
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%5:gpr(s32) = G_ICMP intpred(eq), %0(s32), %2
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$w0 = COPY %5(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: cmp_neg_imm_32
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1:
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liveins: $w0
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; CHECK-LABEL: name: cmp_neg_imm_32
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; CHECK: liveins: $w0
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; CHECK: %reg0:gpr32sp = COPY $w0
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; CHECK: [[ADDSWri:%[0-9]+]]:gpr32 = ADDSWri %reg0, 10, 0, implicit-def $nzcv
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; CHECK: %cmp:gpr32 = CSINCWr $wzr, $wzr, 1, implicit $nzcv
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; CHECK: $w0 = COPY %cmp
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; CHECK: RET_ReallyLR implicit $w0
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%reg0:gpr(s32) = COPY $w0
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%cst:gpr(s32) = G_CONSTANT i32 -10
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%cmp:gpr(s32) = G_ICMP intpred(eq), %reg0(s32), %cst
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$w0 = COPY %cmp(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: cmp_neg_imm_64
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1:
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liveins: $x0
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; CHECK-LABEL: name: cmp_neg_imm_64
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; CHECK: liveins: $x0
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; CHECK: %reg0:gpr64sp = COPY $x0
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; CHECK: [[ADDSXri:%[0-9]+]]:gpr64 = ADDSXri %reg0, 10, 0, implicit-def $nzcv
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; CHECK: %cmp:gpr32 = CSINCWr $wzr, $wzr, 1, implicit $nzcv
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; CHECK: $w0 = COPY %cmp
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; CHECK: RET_ReallyLR implicit $w0
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%reg0:gpr(s64) = COPY $x0
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%cst:gpr(s64) = G_CONSTANT i64 -10
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%cmp:gpr(s32) = G_ICMP intpred(eq), %reg0(s64), %cst
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$w0 = COPY %cmp(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: cmp_neg_imm_invalid
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1:
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liveins: $w0
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; CHECK-LABEL: name: cmp_neg_imm_invalid
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; CHECK: liveins: $w0
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; CHECK: %reg0:gpr32 = COPY $w0
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; CHECK: %cst:gpr32 = MOVi32imm -5000
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; CHECK: [[SUBSWrr:%[0-9]+]]:gpr32 = SUBSWrr %reg0, %cst, implicit-def $nzcv
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; CHECK: %cmp:gpr32 = CSINCWr $wzr, $wzr, 1, implicit $nzcv
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; CHECK: $w0 = COPY %cmp
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; CHECK: RET_ReallyLR implicit $w0
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%reg0:gpr(s32) = COPY $w0
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%cst:gpr(s32) = G_CONSTANT i32 -5000
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%cmp:gpr(s32) = G_ICMP intpred(eq), %reg0(s32), %cst
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$w0 = COPY %cmp(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: cmp_arith_extended_s64
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $w0, $x1
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; CHECK-LABEL: name: cmp_arith_extended_s64
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; CHECK: liveins: $w0, $x1
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; CHECK: %reg0:gpr32 = COPY $w0
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; CHECK: %reg1:gpr64sp = COPY $x1
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; CHECK: [[SUBSXrx:%[0-9]+]]:gpr64 = SUBSXrx %reg1, %reg0, 18, implicit-def $nzcv
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; CHECK: %cmp:gpr32 = CSINCWr $wzr, $wzr, 9, implicit $nzcv
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; CHECK: $w0 = COPY %cmp
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; CHECK: RET_ReallyLR implicit $w0
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%reg0:gpr(s32) = COPY $w0
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%reg1:gpr(s64) = COPY $x1
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%ext:gpr(s64) = G_ZEXT %reg0(s32)
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%cst:gpr(s64) = G_CONSTANT i64 2
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%shift:gpr(s64) = G_SHL %ext, %cst(s64)
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%cmp:gpr(s32) = G_ICMP intpred(ugt), %reg1(s64), %shift
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$w0 = COPY %cmp(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: cmp_arith_extended_s32
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $w0, $w1, $h0
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; CHECK-LABEL: name: cmp_arith_extended_s32
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; CHECK: liveins: $w0, $w1, $h0
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; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:fpr32 = SUBREG_TO_REG 0, $h0, %subreg.hsub
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; CHECK: %reg0:gpr32all = COPY [[SUBREG_TO_REG]]
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; CHECK: %reg1:gpr32sp = COPY $w1
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; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY %reg0
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; CHECK: [[SUBSWrx:%[0-9]+]]:gpr32 = SUBSWrx %reg1, [[COPY]], 10, implicit-def $nzcv
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; CHECK: %cmp:gpr32 = CSINCWr $wzr, $wzr, 9, implicit $nzcv
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; CHECK: $w0 = COPY %cmp
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; CHECK: RET_ReallyLR implicit $w0
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%reg0:gpr(s16) = COPY $h0
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%reg1:gpr(s32) = COPY $w1
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%ext:gpr(s32) = G_ZEXT %reg0(s16)
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%cst:gpr(s32) = G_CONSTANT i32 2
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%shift:gpr(s32) = G_SHL %ext, %cst(s32)
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%cmp:gpr(s32) = G_ICMP intpred(ugt), %reg1(s32), %shift
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$w0 = COPY %cmp(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: cmp_arith_extended_shl_too_large
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $w0, $x1
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; The constant on the G_SHL is > 4, so we won't sleect SUBSXrx
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; CHECK-LABEL: name: cmp_arith_extended_shl_too_large
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; CHECK: liveins: $w0, $x1
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; CHECK: %reg0:gpr32 = COPY $w0
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; CHECK: %reg1:gpr64 = COPY $x1
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; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64 = SUBREG_TO_REG 0, %reg0, %subreg.sub_32
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; CHECK: %ext:gpr64 = UBFMXri [[SUBREG_TO_REG]], 0, 31
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; CHECK: [[SUBSXrs:%[0-9]+]]:gpr64 = SUBSXrs %reg1, %ext, 5, implicit-def $nzcv
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; CHECK: %cmp:gpr32 = CSINCWr $wzr, $wzr, 9, implicit $nzcv
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; CHECK: $w0 = COPY %cmp
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; CHECK: RET_ReallyLR implicit $w0
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%reg0:gpr(s32) = COPY $w0
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%reg1:gpr(s64) = COPY $x1
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%ext:gpr(s64) = G_ZEXT %reg0(s32)
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%cst:gpr(s64) = G_CONSTANT i64 5
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%shift:gpr(s64) = G_SHL %ext, %cst(s64)
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%cmp:gpr(s32) = G_ICMP intpred(ugt), %reg1(s64), %shift
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$w0 = COPY %cmp(s32)
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RET_ReallyLR implicit $w0
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...
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