396 lines
11 KiB
Plaintext
396 lines
11 KiB
Plaintext
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=aarch64-unknown-unknown -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
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---
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name: add_shl_s64_rhs
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x0
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; CHECK-LABEL: name: add_shl_s64_rhs
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; CHECK: liveins: $x0
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; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
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; CHECK: [[ADDXrs:%[0-9]+]]:gpr64 = ADDXrs [[COPY]], [[COPY]], 8
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; CHECK: $x0 = COPY [[ADDXrs]]
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; CHECK: RET_ReallyLR implicit $x0
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%0:gpr(s64) = COPY $x0
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%1:gpr(s64) = G_CONSTANT i64 8
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%2:gpr(s64) = G_SHL %0, %1:gpr(s64)
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%3:gpr(s64) = G_ADD %0, %2:gpr(s64)
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$x0 = COPY %3:gpr(s64)
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RET_ReallyLR implicit $x0
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...
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---
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name: add_shl_s64_lhs
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x0, $x1
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; CHECK-LABEL: name: add_shl_s64_lhs
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; CHECK: liveins: $x0, $x1
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; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
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; CHECK: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
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; CHECK: [[ADDXrs:%[0-9]+]]:gpr64 = ADDXrs [[COPY1]], [[COPY]], 8
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; CHECK: $x0 = COPY [[ADDXrs]]
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; CHECK: RET_ReallyLR implicit $x0
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%0:gpr(s64) = COPY $x0
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%4:gpr(s64) = COPY $x1
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%1:gpr(s64) = G_CONSTANT i64 8
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%2:gpr(s64) = G_SHL %0, %1:gpr(s64)
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%3:gpr(s64) = G_ADD %2, %4:gpr(s64)
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$x0 = COPY %3:gpr(s64)
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RET_ReallyLR implicit $x0
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...
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---
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name: sub_shl_s64_rhs
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x0
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; CHECK-LABEL: name: sub_shl_s64_rhs
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; CHECK: liveins: $x0
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; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
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; CHECK: [[SUBSXrs:%[0-9]+]]:gpr64 = SUBSXrs [[COPY]], [[COPY]], 8, implicit-def $nzcv
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; CHECK: $x0 = COPY [[SUBSXrs]]
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; CHECK: RET_ReallyLR implicit $x0
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%0:gpr(s64) = COPY $x0
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%1:gpr(s64) = G_CONSTANT i64 8
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%2:gpr(s64) = G_SHL %0, %1:gpr(s64)
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%3:gpr(s64) = G_SUB %0, %2:gpr(s64)
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$x0 = COPY %3:gpr(s64)
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RET_ReallyLR implicit $x0
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---
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name: add_lshr_s64_rhs
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x0
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%0:gpr(s64) = COPY $x0
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%1:gpr(s64) = G_CONSTANT i64 8
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%2:gpr(s64) = G_LSHR %0, %1:gpr(s64)
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%3:gpr(s64) = G_ADD %0, %2:gpr(s64)
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$x0 = COPY %3:gpr(s64)
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RET_ReallyLR implicit $x0
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...
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---
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name: add_lshr_s64_lhs
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x0, $x1
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; CHECK-LABEL: name: add_lshr_s64_lhs
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; CHECK: liveins: $x0, $x1
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; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
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; CHECK: %param2:gpr64 = COPY $x1
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; CHECK: [[ADDXrs:%[0-9]+]]:gpr64 = ADDXrs %param2, [[COPY]], 72
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; CHECK: $x0 = COPY [[ADDXrs]]
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; CHECK: RET_ReallyLR implicit $x0
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%0:gpr(s64) = COPY $x0
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%param2:gpr(s64) = COPY $x1
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%1:gpr(s64) = G_CONSTANT i64 8
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%2:gpr(s64) = G_LSHR %0, %1:gpr(s64)
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%3:gpr(s64) = G_ADD %2, %param2:gpr(s64)
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$x0 = COPY %3:gpr(s64)
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RET_ReallyLR implicit $x0
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...
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---
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name: sub_lshr_s64_rhs
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x0
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; CHECK-LABEL: name: sub_lshr_s64_rhs
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; CHECK: liveins: $x0
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; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
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; CHECK: [[SUBSXrs:%[0-9]+]]:gpr64 = SUBSXrs [[COPY]], [[COPY]], 72, implicit-def $nzcv
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; CHECK: $x0 = COPY [[SUBSXrs]]
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; CHECK: RET_ReallyLR implicit $x0
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%0:gpr(s64) = COPY $x0
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%1:gpr(s64) = G_CONSTANT i64 8
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%2:gpr(s64) = G_LSHR %0, %1:gpr(s64)
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%3:gpr(s64) = G_SUB %0, %2:gpr(s64)
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$x0 = COPY %3:gpr(s64)
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RET_ReallyLR implicit $x0
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...
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---
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name: add_ashr_s64_rhs
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x0
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; CHECK-LABEL: name: add_ashr_s64_rhs
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; CHECK: liveins: $x0
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; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
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; CHECK: [[ADDXrs:%[0-9]+]]:gpr64 = ADDXrs [[COPY]], [[COPY]], 136
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; CHECK: $x0 = COPY [[ADDXrs]]
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; CHECK: RET_ReallyLR implicit $x0
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%0:gpr(s64) = COPY $x0
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%1:gpr(s64) = G_CONSTANT i64 8
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%2:gpr(s64) = G_ASHR %0, %1:gpr(s64)
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%3:gpr(s64) = G_ADD %0, %2:gpr(s64)
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$x0 = COPY %3:gpr(s64)
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RET_ReallyLR implicit $x0
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...
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---
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name: add_ashr_s64_lhs
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x0, $x1
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; CHECK-LABEL: name: add_ashr_s64_lhs
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; CHECK: liveins: $x0, $x1
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; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
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; CHECK: %param2:gpr64 = COPY $x1
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; CHECK: [[ADDXrs:%[0-9]+]]:gpr64 = ADDXrs %param2, [[COPY]], 136
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; CHECK: $x0 = COPY [[ADDXrs]]
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; CHECK: RET_ReallyLR implicit $x0
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%0:gpr(s64) = COPY $x0
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%param2:gpr(s64) = COPY $x1
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%1:gpr(s64) = G_CONSTANT i64 8
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%2:gpr(s64) = G_ASHR %0, %1:gpr(s64)
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%3:gpr(s64) = G_ADD %2, %param2:gpr(s64)
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$x0 = COPY %3:gpr(s64)
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RET_ReallyLR implicit $x0
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...
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---
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name: sub_ashr_s64_rhs
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x0
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; CHECK-LABEL: name: sub_ashr_s64_rhs
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; CHECK: liveins: $x0
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; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
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; CHECK: [[SUBSXrs:%[0-9]+]]:gpr64 = SUBSXrs [[COPY]], [[COPY]], 136, implicit-def $nzcv
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; CHECK: $x0 = COPY [[SUBSXrs]]
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; CHECK: RET_ReallyLR implicit $x0
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%0:gpr(s64) = COPY $x0
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%1:gpr(s64) = G_CONSTANT i64 8
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%2:gpr(s64) = G_ASHR %0, %1:gpr(s64)
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%3:gpr(s64) = G_SUB %0, %2:gpr(s64)
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$x0 = COPY %3:gpr(s64)
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RET_ReallyLR implicit $x0
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---
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name: add_shl_s32_rhs
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $w0
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%0:gpr(s32) = COPY $w0
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%1:gpr(s32) = G_CONSTANT i32 8
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%2:gpr(s32) = G_SHL %0, %1:gpr(s32)
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%3:gpr(s32) = G_ADD %0, %2:gpr(s32)
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$w0 = COPY %3:gpr(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: add_shl_s32_lhs
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $w0, $w1
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; CHECK-LABEL: name: add_shl_s32_lhs
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; CHECK: liveins: $w0, $w1
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; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
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; CHECK: %param2:gpr32 = COPY $w1
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; CHECK: [[ADDWrs:%[0-9]+]]:gpr32 = ADDWrs %param2, [[COPY]], 8
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; CHECK: $w0 = COPY [[ADDWrs]]
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; CHECK: RET_ReallyLR implicit $w0
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%0:gpr(s32) = COPY $w0
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%param2:gpr(s32) = COPY $w1
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%1:gpr(s32) = G_CONSTANT i32 8
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%2:gpr(s32) = G_SHL %0, %1:gpr(s32)
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%3:gpr(s32) = G_ADD %2, %param2:gpr(s32)
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$w0 = COPY %3:gpr(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: sub_shl_s32_rhs
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $w0
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; CHECK-LABEL: name: sub_shl_s32_rhs
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; CHECK: liveins: $w0
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; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
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; CHECK: [[SUBSWrs:%[0-9]+]]:gpr32 = SUBSWrs [[COPY]], [[COPY]], 8, implicit-def $nzcv
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; CHECK: $w0 = COPY [[SUBSWrs]]
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; CHECK: RET_ReallyLR implicit $w0
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%0:gpr(s32) = COPY $w0
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%1:gpr(s32) = G_CONSTANT i32 8
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%2:gpr(s32) = G_SHL %0, %1:gpr(s32)
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%3:gpr(s32) = G_SUB %0, %2:gpr(s32)
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$w0 = COPY %3:gpr(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: add_lshr_s32_rhs
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $w0
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; CHECK-LABEL: name: add_lshr_s32_rhs
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; CHECK: liveins: $w0
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; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
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; CHECK: [[ADDWrs:%[0-9]+]]:gpr32 = ADDWrs [[COPY]], [[COPY]], 72
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; CHECK: $w0 = COPY [[ADDWrs]]
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; CHECK: RET_ReallyLR implicit $w0
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%0:gpr(s32) = COPY $w0
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%1:gpr(s32) = G_CONSTANT i32 8
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%2:gpr(s32) = G_LSHR %0, %1:gpr(s32)
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%3:gpr(s32) = G_ADD %0, %2:gpr(s32)
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$w0 = COPY %3:gpr(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: add_lshr_s32_lhs
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $w0, $w1
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; CHECK-LABEL: name: add_lshr_s32_lhs
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; CHECK: liveins: $w0, $w1
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; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
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; CHECK: %param2:gpr32 = COPY $w1
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; CHECK: [[ADDWrs:%[0-9]+]]:gpr32 = ADDWrs %param2, [[COPY]], 72
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; CHECK: $w0 = COPY [[ADDWrs]]
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; CHECK: RET_ReallyLR implicit $w0
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%0:gpr(s32) = COPY $w0
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%param2:gpr(s32) = COPY $w1
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%1:gpr(s32) = G_CONSTANT i32 8
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%2:gpr(s32) = G_LSHR %0, %1:gpr(s32)
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%3:gpr(s32) = G_ADD %2, %param2:gpr(s32)
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$w0 = COPY %3:gpr(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: sub_lshr_s32_rhs
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $w0
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; CHECK-LABEL: name: sub_lshr_s32_rhs
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; CHECK: liveins: $w0
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; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
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; CHECK: [[SUBSWrs:%[0-9]+]]:gpr32 = SUBSWrs [[COPY]], [[COPY]], 72, implicit-def $nzcv
|
||
|
|
; CHECK: $w0 = COPY [[SUBSWrs]]
|
||
|
|
; CHECK: RET_ReallyLR implicit $w0
|
||
|
|
%0:gpr(s32) = COPY $w0
|
||
|
|
%1:gpr(s32) = G_CONSTANT i32 8
|
||
|
|
%2:gpr(s32) = G_LSHR %0, %1:gpr(s32)
|
||
|
|
%3:gpr(s32) = G_SUB %0, %2:gpr(s32)
|
||
|
|
$w0 = COPY %3:gpr(s32)
|
||
|
|
RET_ReallyLR implicit $w0
|
||
|
|
|
||
|
|
...
|
||
|
|
---
|
||
|
|
name: add_ashr_s32_rhs
|
||
|
|
legalized: true
|
||
|
|
regBankSelected: true
|
||
|
|
tracksRegLiveness: true
|
||
|
|
body: |
|
||
|
|
bb.0:
|
||
|
|
liveins: $w0
|
||
|
|
; CHECK-LABEL: name: add_ashr_s32_rhs
|
||
|
|
; CHECK: liveins: $w0
|
||
|
|
; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
|
||
|
|
; CHECK: [[ADDWrs:%[0-9]+]]:gpr32 = ADDWrs [[COPY]], [[COPY]], 136
|
||
|
|
; CHECK: $w0 = COPY [[ADDWrs]]
|
||
|
|
; CHECK: RET_ReallyLR implicit $w0
|
||
|
|
%0:gpr(s32) = COPY $w0
|
||
|
|
%1:gpr(s32) = G_CONSTANT i32 8
|
||
|
|
%2:gpr(s32) = G_ASHR %0, %1:gpr(s32)
|
||
|
|
%3:gpr(s32) = G_ADD %0, %2:gpr(s32)
|
||
|
|
$w0 = COPY %3:gpr(s32)
|
||
|
|
RET_ReallyLR implicit $w0
|
||
|
|
|
||
|
|
...
|
||
|
|
---
|
||
|
|
name: add_ashr_s32_lhs
|
||
|
|
legalized: true
|
||
|
|
regBankSelected: true
|
||
|
|
tracksRegLiveness: true
|
||
|
|
body: |
|
||
|
|
bb.0:
|
||
|
|
liveins: $w0, $w1
|
||
|
|
; CHECK-LABEL: name: add_ashr_s32_lhs
|
||
|
|
; CHECK: liveins: $w0, $w1
|
||
|
|
; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
|
||
|
|
; CHECK: %param2:gpr32 = COPY $w1
|
||
|
|
; CHECK: [[ADDWrs:%[0-9]+]]:gpr32 = ADDWrs %param2, [[COPY]], 136
|
||
|
|
; CHECK: $w0 = COPY [[ADDWrs]]
|
||
|
|
; CHECK: RET_ReallyLR implicit $w0
|
||
|
|
%0:gpr(s32) = COPY $w0
|
||
|
|
%param2:gpr(s32) = COPY $w1
|
||
|
|
%1:gpr(s32) = G_CONSTANT i32 8
|
||
|
|
%2:gpr(s32) = G_ASHR %0, %1:gpr(s32)
|
||
|
|
%3:gpr(s32) = G_ADD %2, %param2:gpr(s32)
|
||
|
|
$w0 = COPY %3:gpr(s32)
|
||
|
|
RET_ReallyLR implicit $w0
|
||
|
|
|
||
|
|
...
|
||
|
|
---
|
||
|
|
name: sub_ashr_s32_rhs
|
||
|
|
legalized: true
|
||
|
|
regBankSelected: true
|
||
|
|
tracksRegLiveness: true
|
||
|
|
body: |
|
||
|
|
bb.0:
|
||
|
|
liveins: $w0
|
||
|
|
; CHECK-LABEL: name: sub_ashr_s32_rhs
|
||
|
|
; CHECK: liveins: $w0
|
||
|
|
; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
|
||
|
|
; CHECK: [[SUBSWrs:%[0-9]+]]:gpr32 = SUBSWrs [[COPY]], [[COPY]], 136, implicit-def $nzcv
|
||
|
|
; CHECK: $w0 = COPY [[SUBSWrs]]
|
||
|
|
; CHECK: RET_ReallyLR implicit $w0
|
||
|
|
%0:gpr(s32) = COPY $w0
|
||
|
|
%1:gpr(s32) = G_CONSTANT i32 8
|
||
|
|
%2:gpr(s32) = G_ASHR %0, %1:gpr(s32)
|
||
|
|
%3:gpr(s32) = G_SUB %0, %2:gpr(s32)
|
||
|
|
$w0 = COPY %3:gpr(s32)
|
||
|
|
RET_ReallyLR implicit $w0
|