llvm-for-llvmta/test/CodeGen/AArch64/GlobalISel/reg-bank-128bit.mir

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2022-04-25 10:02:23 +02:00
# RUN: llc -mtriple=aarch64 -run-pass=regbankselect -o - %s | FileCheck %s
---
name: test_large_merge
legalized: true
registers:
body: |
bb.0.entry:
liveins: $x0, $x1, $x2
; CHECK-LABEL: name: test_large_merge
; CHECK: registers:
; CHECK: - { id: 0, class: gpr
; CHECK: - { id: 1, class: gpr
; CHECK: - { id: 2, class: gpr
; CHECK: - { id: 3, class: fpr
%0:_(s64) = COPY $x0
%1:_(s64) = COPY $x1
%2:_(p0) = COPY $x2
%3:_(s128) = G_MERGE_VALUES %0, %1
%4:_(s64) = G_TRUNC %3
$d0 = COPY %4
...