114 lines
3.3 KiB
Plaintext
114 lines
3.3 KiB
Plaintext
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -debugify-and-strip-all-safe -O0 -run-pass=aarch64-prelegalizer-combiner --aarch64prelegalizercombinerhelper-only-enable-rule="opt_brcond_by_inverting_cond" -global-isel -verify-machineinstrs %s -o - | FileCheck %s
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# Need asserts for the only-enable-rule to work.
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# REQUIRES: asserts
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--- |
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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target triple = "arm64-apple-ios5.0.0"
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define i32 @foo(i32 %a, i32 %b) {
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entry:
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%cmp = icmp sgt i32 %a, 0
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br i1 %cmp, label %if.then, label %if.end
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if.then:
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%add = add nsw i32 %b, %a
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%add1 = add nsw i32 %a, %b
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br label %return
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if.end:
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%mul = mul nsw i32 %b, %b
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%add2 = add nuw nsw i32 %mul, 2
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br label %return
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return:
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%retval.0 = phi i32 [ %add1, %if.then ], [ %add2, %if.end ]
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ret i32 %retval.0
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}
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define void @dont_combine_same_block() { ret void }
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...
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---
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name: foo
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tracksRegLiveness: true
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body: |
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; CHECK-LABEL: name: foo
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; CHECK: bb.0.entry:
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; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000)
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; CHECK: liveins: $w0, $w1
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
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; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[COPY]](s32), [[C]]
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; CHECK: [[C2:%[0-9]+]]:_(s1) = G_CONSTANT i1 true
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; CHECK: [[XOR:%[0-9]+]]:_(s1) = G_XOR [[ICMP]], [[C2]]
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; CHECK: G_BRCOND [[XOR]](s1), %bb.2
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; CHECK: G_BR %bb.1
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; CHECK: bb.1.if.then:
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; CHECK: successors: %bb.3(0x80000000)
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; CHECK: [[ADD:%[0-9]+]]:_(s32) = nsw G_ADD [[COPY1]], [[COPY]]
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; CHECK: [[ADD1:%[0-9]+]]:_(s32) = nsw G_ADD [[ADD]], [[COPY1]]
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; CHECK: G_BR %bb.3
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; CHECK: bb.2.if.end:
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; CHECK: successors: %bb.3(0x80000000)
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; CHECK: [[MUL:%[0-9]+]]:_(s32) = nsw G_MUL [[COPY1]], [[COPY1]]
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; CHECK: [[ADD2:%[0-9]+]]:_(s32) = nuw nsw G_ADD [[MUL]], [[C1]]
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; CHECK: bb.3.return:
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; CHECK: [[PHI:%[0-9]+]]:_(s32) = G_PHI [[ADD1]](s32), %bb.1, [[ADD2]](s32), %bb.2
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; CHECK: $w0 = COPY [[PHI]](s32)
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; CHECK: RET_ReallyLR implicit $w0
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bb.1.entry:
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liveins: $w0, $w1
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%0:_(s32) = COPY $w0
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%1:_(s32) = COPY $w1
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%2:_(s32) = G_CONSTANT i32 0
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%5:_(s32) = G_CONSTANT i32 2
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%3:_(s1) = G_ICMP intpred(sgt), %0(s32), %2
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G_BRCOND %3(s1), %bb.2
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G_BR %bb.3
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bb.2.if.then:
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%7:_(s32) = nsw G_ADD %1, %0
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%8:_(s32) = nsw G_ADD %7, %1
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G_BR %bb.4
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bb.3.if.end:
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%4:_(s32) = nsw G_MUL %1, %1
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%6:_(s32) = nuw nsw G_ADD %4, %5
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bb.4.return:
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%10:_(s32) = G_PHI %8(s32), %bb.2, %6(s32), %bb.3
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$w0 = COPY %10(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: dont_combine_same_block
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tracksRegLiveness: true
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body: |
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; CHECK-LABEL: name: dont_combine_same_block
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; CHECK: bb.0:
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; CHECK: successors: %bb.1(0x80000000)
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; CHECK: liveins: $w0, $w1
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; CHECK: %cond:_(s1) = G_IMPLICIT_DEF
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; CHECK: G_BRCOND %cond(s1), %bb.1
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; CHECK: G_BR %bb.1
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; CHECK: bb.1:
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; CHECK: RET_ReallyLR
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bb.0:
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liveins: $w0, $w1
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%cond:_(s1) = G_IMPLICIT_DEF
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; The G_BRCOND and G_BR have the same target here. Don't change anything.
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G_BRCOND %cond(s1), %bb.1
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G_BR %bb.1
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bb.1:
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RET_ReallyLR
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...
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