189 lines
5.4 KiB
Plaintext
189 lines
5.4 KiB
Plaintext
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple aarch64-unknown-unknown -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
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...
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---
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name: flip_eq
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alignment: 4
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legalized: true
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regBankSelected: true
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body: |
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; CHECK-LABEL: name: flip_eq
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; CHECK: bb.0:
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; CHECK: successors: %bb.0(0x40000000), %bb.1(0x40000000)
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; CHECK: %copy:gpr64all = COPY $x0
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; CHECK: [[COPY:%[0-9]+]]:gpr32all = COPY %copy.sub_32
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; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY [[COPY]]
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; CHECK: TBNZW [[COPY1]], 3, %bb.1
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; CHECK: B %bb.0
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; CHECK: bb.1:
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; CHECK: RET_ReallyLR
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bb.0:
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successors: %bb.0, %bb.1
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liveins: $x0
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%copy:gpr(s64) = COPY $x0
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; Check bit 3.
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%bit:gpr(s64) = G_CONSTANT i64 8
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%zero:gpr(s64) = G_CONSTANT i64 0
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; 8 has the third bit set.
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%fold_cst:gpr(s64) = G_CONSTANT i64 8
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; This only has the third bit set if %copy does not. So, to walk through
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; this, we want to use a TBNZW on %copy.
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%fold_me:gpr(s64) = G_XOR %copy, %fold_cst
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%and:gpr(s64) = G_AND %fold_me, %bit
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%cmp:gpr(s32) = G_ICMP intpred(eq), %and(s64), %zero
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%cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32)
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G_BRCOND %cmp_trunc(s1), %bb.1
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G_BR %bb.0
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bb.1:
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RET_ReallyLR
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...
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---
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name: flip_ne
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alignment: 4
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legalized: true
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regBankSelected: true
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body: |
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; CHECK-LABEL: name: flip_ne
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; CHECK: bb.0:
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; CHECK: successors: %bb.0(0x40000000), %bb.1(0x40000000)
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; CHECK: %copy:gpr64all = COPY $x0
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; CHECK: [[COPY:%[0-9]+]]:gpr32all = COPY %copy.sub_32
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; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY [[COPY]]
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; CHECK: TBZW [[COPY1]], 3, %bb.1
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; CHECK: B %bb.0
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; CHECK: bb.1:
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; CHECK: RET_ReallyLR
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bb.0:
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successors: %bb.0, %bb.1
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liveins: $x0
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; Same as eq case, but we should get a TBZW instead.
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%copy:gpr(s64) = COPY $x0
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%bit:gpr(s64) = G_CONSTANT i64 8
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%zero:gpr(s64) = G_CONSTANT i64 0
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%fold_cst:gpr(s64) = G_CONSTANT i64 8
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%fold_me:gpr(s64) = G_XOR %copy, %fold_cst
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%and:gpr(s64) = G_AND %fold_me, %bit
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%cmp:gpr(s32) = G_ICMP intpred(ne), %and(s64), %zero
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%cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32)
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G_BRCOND %cmp_trunc(s1), %bb.1
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G_BR %bb.0
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bb.1:
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RET_ReallyLR
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...
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---
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name: dont_flip_eq
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alignment: 4
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legalized: true
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regBankSelected: true
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body: |
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; CHECK-LABEL: name: dont_flip_eq
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; CHECK: bb.0:
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; CHECK: successors: %bb.0(0x40000000), %bb.1(0x40000000)
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; CHECK: %copy:gpr64all = COPY $x0
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; CHECK: [[COPY:%[0-9]+]]:gpr32all = COPY %copy.sub_32
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; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY [[COPY]]
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; CHECK: TBZW [[COPY1]], 3, %bb.1
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; CHECK: B %bb.0
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; CHECK: bb.1:
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; CHECK: RET_ReallyLR
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bb.0:
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successors: %bb.0, %bb.1
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liveins: $x0
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%copy:gpr(s64) = COPY $x0
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; Check bit 3.
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%bit:gpr(s64) = G_CONSTANT i64 8
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%zero:gpr(s64) = G_CONSTANT i64 0
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; 7 does not have the third bit set.
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%fold_cst:gpr(s64) = G_CONSTANT i64 7
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; This only has the third bit set if %copy does. So, to walk through this,
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; we should have a TBZW on %copy.
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%fold_me:gpr(s64) = G_XOR %fold_cst, %copy
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%and:gpr(s64) = G_AND %fold_me, %bit
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%cmp:gpr(s32) = G_ICMP intpred(eq), %and(s64), %zero
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%cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32)
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G_BRCOND %cmp_trunc(s1), %bb.1
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G_BR %bb.0
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bb.1:
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RET_ReallyLR
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...
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---
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name: dont_flip_ne
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alignment: 4
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legalized: true
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regBankSelected: true
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body: |
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; CHECK-LABEL: name: dont_flip_ne
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; CHECK: bb.0:
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; CHECK: successors: %bb.0(0x40000000), %bb.1(0x40000000)
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; CHECK: %copy:gpr64all = COPY $x0
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; CHECK: [[COPY:%[0-9]+]]:gpr32all = COPY %copy.sub_32
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; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY [[COPY]]
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; CHECK: TBNZW [[COPY1]], 3, %bb.1
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; CHECK: B %bb.0
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; CHECK: bb.1:
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; CHECK: RET_ReallyLR
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bb.0:
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successors: %bb.0, %bb.1
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liveins: $x0
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; Same as eq case, but we should get a TBNZW instead.
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%copy:gpr(s64) = COPY $x0
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%bit:gpr(s64) = G_CONSTANT i64 8
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%zero:gpr(s64) = G_CONSTANT i64 0
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%fold_cst:gpr(s64) = G_CONSTANT i64 7
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%fold_me:gpr(s64) = G_XOR %fold_cst, %copy
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%and:gpr(s64) = G_AND %fold_me, %bit
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%cmp:gpr(s32) = G_ICMP intpred(ne), %and(s64), %zero
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%cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32)
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G_BRCOND %cmp_trunc(s1), %bb.1
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G_BR %bb.0
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bb.1:
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RET_ReallyLR
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...
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---
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name: xor_chain
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alignment: 4
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legalized: true
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regBankSelected: true
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body: |
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; CHECK-LABEL: name: xor_chain
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; CHECK: bb.0:
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; CHECK: successors: %bb.0(0x40000000), %bb.1(0x40000000)
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; CHECK: %copy:gpr64all = COPY $x0
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; CHECK: [[COPY:%[0-9]+]]:gpr32all = COPY %copy.sub_32
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; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY [[COPY]]
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; CHECK: TBZW [[COPY1]], 3, %bb.1
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; CHECK: B %bb.0
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; CHECK: bb.1:
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; CHECK: RET_ReallyLR
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bb.0:
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successors: %bb.0, %bb.1
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liveins: $x0
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%copy:gpr(s64) = COPY $x0
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%bit:gpr(s64) = G_CONSTANT i64 8
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%zero:gpr(s64) = G_CONSTANT i64 0
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%fold_cst:gpr(s64) = G_CONSTANT i64 8
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; The G_XORs cancel each other out, so we should get a TBZW.
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%xor1:gpr(s64) = G_XOR %copy, %fold_cst
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%xor2:gpr(s64) = G_XOR %xor1, %fold_cst
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%and:gpr(s64) = G_AND %xor2, %bit
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%cmp:gpr(s32) = G_ICMP intpred(eq), %and(s64), %zero
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%cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32)
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G_BRCOND %cmp_trunc(s1), %bb.1
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G_BR %bb.0
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bb.1:
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RET_ReallyLR
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