llvm-for-llvmta/test/CodeGen/AArch64/GlobalISel/legalize-sext-zext-128.mir

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2022-04-25 10:02:23 +02:00
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=aarch64 -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s
---
name: narrow_sext_s128
tracksRegLiveness: true
body: |
bb.1:
liveins: $x0, $x1
; CHECK-LABEL: name: narrow_sext_s128
; CHECK: liveins: $x0, $x1
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
; CHECK: [[COPY1:%[0-9]+]]:_(p0) = COPY $x1
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 63
; CHECK: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[COPY]], [[C]](s64)
; CHECK: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[COPY]](s64), [[ASHR]](s64)
; CHECK: G_STORE [[MV]](s128), [[COPY1]](p0) :: (store 16)
; CHECK: RET_ReallyLR
%0:_(s64) = COPY $x0
%1:_(p0) = COPY $x1
%2:_(s128) = G_SEXT %0(s64)
G_STORE %2(s128), %1(p0) :: (store 16)
RET_ReallyLR
...
---
name: narrow_zext_s128
tracksRegLiveness: true
body: |
bb.1:
liveins: $x0, $x1
; CHECK-LABEL: name: narrow_zext_s128
; CHECK: liveins: $x0, $x1
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
; CHECK: [[COPY1:%[0-9]+]]:_(p0) = COPY $x1
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
; CHECK: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[COPY]](s64), [[C]](s64)
; CHECK: G_STORE [[MV]](s128), [[COPY1]](p0) :: (store 16)
; CHECK: RET_ReallyLR
%0:_(s64) = COPY $x0
%1:_(p0) = COPY $x1
%2:_(s128) = G_ZEXT %0(s64)
G_STORE %2(s128), %1(p0) :: (store 16)
RET_ReallyLR
...
---
name: narrow_zext_s128_from_s32
tracksRegLiveness: true
body: |
bb.1:
liveins: $w0, $x1
; CHECK-LABEL: name: narrow_zext_s128_from_s32
; CHECK: liveins: $w0, $x1
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
; CHECK: [[COPY1:%[0-9]+]]:_(p0) = COPY $x1
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[C]](s32)
; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
; CHECK: [[MV1:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[MV]](s64), [[C1]](s64)
; CHECK: G_STORE [[MV1]](s128), [[COPY1]](p0) :: (store 16)
; CHECK: RET_ReallyLR
%0:_(s32) = COPY $w0
%1:_(p0) = COPY $x1
%2:_(s128) = G_ZEXT %0(s32)
G_STORE %2(s128), %1(p0) :: (store 16)
RET_ReallyLR
...
---
name: narrow_zext_s192
tracksRegLiveness: true
body: |
bb.1:
liveins: $x0, $x1
; CHECK-LABEL: name: narrow_zext_s192
; CHECK: liveins: $x0, $x1
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
; CHECK: [[COPY1:%[0-9]+]]:_(p0) = COPY $x1
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
; CHECK: G_STORE [[COPY]](s64), [[COPY1]](p0) :: (store 8)
; CHECK: G_STORE [[C]](s64), [[COPY1]](p0) :: (store 8)
; CHECK: G_STORE [[C]](s64), [[COPY1]](p0) :: (store 8)
; CHECK: RET_ReallyLR
%0:_(s64) = COPY $x0
%1:_(p0) = COPY $x1
%2:_(s192) = G_ZEXT %0(s64)
%3:_(s64), %4:_(s64), %5:_(s64) = G_UNMERGE_VALUES %2(s192)
G_STORE %3, %1(p0) :: (store 8)
G_STORE %4, %1(p0) :: (store 8)
G_STORE %5, %1(p0) :: (store 8)
RET_ReallyLR
...