llvm-for-llvmta/test/CodeGen/AArch64/GlobalISel/legalize-global.mir

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2022-04-25 10:02:23 +02:00
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -run-pass=legalizer %s -o - | FileCheck %s
# RUN: llc -O0 -run-pass=legalizer --code-model=large %s -o - | FileCheck %s --check-prefix=CMLARGE
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "aarch64--"
@var = external dso_local global i8
define i8* @test_global() { ret i8* undef }
...
---
name: test_global
registers:
- { id: 0, class: _ }
body: |
bb.0:
; We don't want to lower to G_ADD_LOW when we need a GOT access, or when the code
; model isn't 'Small'.
; CHECK-LABEL: name: test_global
; CHECK: [[ADRP:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @var
; CHECK: [[ADD_LOW:%[0-9]+]]:_(p0) = G_ADD_LOW [[ADRP]](p0), target-flags(aarch64-pageoff, aarch64-nc) @var
; CHECK: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[ADD_LOW]](p0)
; CHECK: $x0 = COPY [[PTRTOINT]](s64)
; PIC-LABEL: name: test_global
; PIC: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @var
; PIC: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[GV]](p0)
; PIC: $x0 = COPY [[PTRTOINT]](s64)
; CMLARGE-LABEL: name: test_global
; CMLARGE: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @var
; CMLARGE: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[GV]](p0)
; CMLARGE: $x0 = COPY [[PTRTOINT]](s64)
%0(p0) = G_GLOBAL_VALUE @var
%1:_(s64) = G_PTRTOINT %0
$x0 = COPY %1
...