367 lines
10 KiB
LLVM
367 lines
10 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
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; RUN: opt < %s -analyze -enable-new-pm=0 -scalar-evolution -scalar-evolution-classify-expressions=0 2>&1 | FileCheck %s
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; RUN: opt < %s -disable-output "-passes=print<scalar-evolution>" -scalar-evolution-classify-expressions=0 2>&1 2>&1 | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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define void @unsimplified_and1(i32 %n) {
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; CHECK-LABEL: 'unsimplified_and1'
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; CHECK-NEXT: Determining loop execution counts for: @unsimplified_and1
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; CHECK-NEXT: Loop %loop: backedge-taken count is %n
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; CHECK-NEXT: Loop %loop: max backedge-taken count is -1
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; CHECK-NEXT: Loop %loop: Predicated backedge-taken count is %n
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; CHECK-NEXT: Predicates:
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; CHECK: Loop %loop: Trip multiple is 1
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;
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entry:
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br label %loop
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loop:
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%iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ]
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%iv.inc = add nsw i32 %iv, 1
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%becond = icmp ule i32 %iv.inc, %n
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%and = and i1 %becond, true
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br i1 %and, label %loop, label %leave
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leave:
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ret void
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}
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define void @unsimplified_and2(i32 %n) {
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; CHECK-LABEL: 'unsimplified_and2'
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; CHECK-NEXT: Determining loop execution counts for: @unsimplified_and2
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; CHECK-NEXT: Loop %loop: backedge-taken count is %n
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; CHECK-NEXT: Loop %loop: max backedge-taken count is -1
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; CHECK-NEXT: Loop %loop: Predicated backedge-taken count is %n
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; CHECK-NEXT: Predicates:
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; CHECK: Loop %loop: Trip multiple is 1
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;
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entry:
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br label %loop
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loop:
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%iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ]
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%iv.inc = add nsw i32 %iv, 1
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%becond = icmp ule i32 %iv.inc, %n
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%and = and i1 true, %becond
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br i1 %and, label %loop, label %leave
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leave:
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ret void
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}
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define void @unsimplified_and3(i32 %n) {
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; CHECK-LABEL: 'unsimplified_and3'
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; CHECK-NEXT: Determining loop execution counts for: @unsimplified_and3
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; CHECK-NEXT: Loop %loop: backedge-taken count is false
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; CHECK-NEXT: Loop %loop: max backedge-taken count is false
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; CHECK-NEXT: Loop %loop: Predicated backedge-taken count is false
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; CHECK-NEXT: Predicates:
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; CHECK: Loop %loop: Trip multiple is 1
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;
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entry:
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br label %loop
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loop:
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%iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ]
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%iv.inc = add nsw i32 %iv, 1
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%becond = icmp ule i32 %iv.inc, %n
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%and = and i1 false, %becond
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br i1 %and, label %loop, label %leave
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leave:
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ret void
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}
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define void @unsimplified_and4(i32 %n) {
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; CHECK-LABEL: 'unsimplified_and4'
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; CHECK-NEXT: Determining loop execution counts for: @unsimplified_and4
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; CHECK-NEXT: Loop %loop: backedge-taken count is false
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; CHECK-NEXT: Loop %loop: max backedge-taken count is false
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; CHECK-NEXT: Loop %loop: Predicated backedge-taken count is false
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; CHECK-NEXT: Predicates:
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; CHECK: Loop %loop: Trip multiple is 1
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;
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entry:
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br label %loop
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loop:
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%iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ]
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%iv.inc = add nsw i32 %iv, 1
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%becond = icmp ule i32 %iv.inc, %n
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%and = and i1 %becond, false
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br i1 %and, label %loop, label %leave
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leave:
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ret void
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}
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define void @unsimplified_or1(i32 %n) {
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; CHECK-LABEL: 'unsimplified_or1'
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; CHECK-NEXT: Determining loop execution counts for: @unsimplified_or1
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; CHECK-NEXT: Loop %loop: Unpredictable backedge-taken count.
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; CHECK-NEXT: Loop %loop: Unpredictable max backedge-taken count.
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; CHECK-NEXT: Loop %loop: Unpredictable predicated backedge-taken count.
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;
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entry:
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br label %loop
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loop:
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%iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ]
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%iv.inc = add nsw i32 %iv, 1
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%becond = icmp ule i32 %iv.inc, %n
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%or = or i1 %becond, true
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br i1 %or, label %loop, label %leave
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leave:
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ret void
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}
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define void @unsimplified_or2(i32 %n) {
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; CHECK-LABEL: 'unsimplified_or2'
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; CHECK-NEXT: Determining loop execution counts for: @unsimplified_or2
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; CHECK-NEXT: Loop %loop: Unpredictable backedge-taken count.
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; CHECK-NEXT: Loop %loop: Unpredictable max backedge-taken count.
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; CHECK-NEXT: Loop %loop: Unpredictable predicated backedge-taken count.
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;
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entry:
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br label %loop
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loop:
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%iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ]
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%iv.inc = add nsw i32 %iv, 1
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%becond = icmp ule i32 %iv.inc, %n
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%or = or i1 true, %becond
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br i1 %or, label %loop, label %leave
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leave:
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ret void
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}
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define void @unsimplified_or3(i32 %n) {
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; CHECK-LABEL: 'unsimplified_or3'
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; CHECK-NEXT: Determining loop execution counts for: @unsimplified_or3
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; CHECK-NEXT: Loop %loop: backedge-taken count is %n
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; CHECK-NEXT: Loop %loop: max backedge-taken count is -1
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; CHECK-NEXT: Loop %loop: Predicated backedge-taken count is %n
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; CHECK-NEXT: Predicates:
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; CHECK: Loop %loop: Trip multiple is 1
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;
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entry:
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br label %loop
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loop:
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%iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ]
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%iv.inc = add nsw i32 %iv, 1
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%becond = icmp ule i32 %iv.inc, %n
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%or = or i1 false, %becond
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br i1 %or, label %loop, label %leave
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leave:
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ret void
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}
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define void @unsimplified_or4(i32 %n) {
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; CHECK-LABEL: 'unsimplified_or4'
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; CHECK-NEXT: Determining loop execution counts for: @unsimplified_or4
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; CHECK-NEXT: Loop %loop: backedge-taken count is %n
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; CHECK-NEXT: Loop %loop: max backedge-taken count is -1
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; CHECK-NEXT: Loop %loop: Predicated backedge-taken count is %n
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; CHECK-NEXT: Predicates:
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; CHECK: Loop %loop: Trip multiple is 1
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;
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entry:
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br label %loop
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loop:
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%iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ]
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%iv.inc = add nsw i32 %iv, 1
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%becond = icmp ule i32 %iv.inc, %n
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%or = or i1 %becond, false
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br i1 %or, label %loop, label %leave
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leave:
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ret void
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}
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define void @reversed_and1(i32 %n) {
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; CHECK-LABEL: 'reversed_and1'
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; CHECK-NEXT: Determining loop execution counts for: @reversed_and1
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; CHECK-NEXT: Loop %loop: backedge-taken count is %n
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; CHECK-NEXT: Loop %loop: max backedge-taken count is -1
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; CHECK-NEXT: Loop %loop: Predicated backedge-taken count is %n
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; CHECK-NEXT: Predicates:
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; CHECK: Loop %loop: Trip multiple is 1
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;
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entry:
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br label %loop
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loop:
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%iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ]
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%iv.inc = add nsw i32 %iv, 1
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%becond = icmp ugt i32 %iv.inc, %n
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%and = and i1 %becond, true
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br i1 %and, label %leave, label %loop
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leave:
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ret void
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}
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define void @reversed_and2(i32 %n) {
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; CHECK-LABEL: 'reversed_and2'
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; CHECK-NEXT: Determining loop execution counts for: @reversed_and2
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; CHECK-NEXT: Loop %loop: backedge-taken count is %n
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; CHECK-NEXT: Loop %loop: max backedge-taken count is -1
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; CHECK-NEXT: Loop %loop: Predicated backedge-taken count is %n
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; CHECK-NEXT: Predicates:
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; CHECK: Loop %loop: Trip multiple is 1
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;
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entry:
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br label %loop
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loop:
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%iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ]
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%iv.inc = add nsw i32 %iv, 1
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%becond = icmp ugt i32 %iv.inc, %n
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%and = and i1 true, %becond
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br i1 %and, label %leave, label %loop
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leave:
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ret void
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}
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define void @reversed_and3(i32 %n) {
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; CHECK-LABEL: 'reversed_and3'
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; CHECK-NEXT: Determining loop execution counts for: @reversed_and3
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; CHECK-NEXT: Loop %loop: Unpredictable backedge-taken count.
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; CHECK-NEXT: Loop %loop: Unpredictable max backedge-taken count.
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; CHECK-NEXT: Loop %loop: Unpredictable predicated backedge-taken count.
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;
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entry:
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br label %loop
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loop:
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%iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ]
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%iv.inc = add nsw i32 %iv, 1
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%becond = icmp ugt i32 %iv.inc, %n
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%and = and i1 false, %becond
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br i1 %and, label %leave, label %loop
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leave:
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ret void
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}
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define void @reversed_and4(i32 %n) {
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; CHECK-LABEL: 'reversed_and4'
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; CHECK-NEXT: Determining loop execution counts for: @reversed_and4
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; CHECK-NEXT: Loop %loop: Unpredictable backedge-taken count.
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; CHECK-NEXT: Loop %loop: Unpredictable max backedge-taken count.
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; CHECK-NEXT: Loop %loop: Unpredictable predicated backedge-taken count.
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;
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entry:
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br label %loop
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loop:
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%iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ]
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%iv.inc = add nsw i32 %iv, 1
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%becond = icmp ugt i32 %iv.inc, %n
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%and = and i1 %becond, false
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br i1 %and, label %leave, label %loop
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leave:
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ret void
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}
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define void @reversed_or1(i32 %n) {
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; CHECK-LABEL: 'reversed_or1'
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; CHECK-NEXT: Determining loop execution counts for: @reversed_or1
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; CHECK-NEXT: Loop %loop: backedge-taken count is false
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; CHECK-NEXT: Loop %loop: max backedge-taken count is false
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; CHECK-NEXT: Loop %loop: Predicated backedge-taken count is false
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; CHECK-NEXT: Predicates:
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; CHECK: Loop %loop: Trip multiple is 1
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;
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entry:
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br label %loop
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loop:
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%iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ]
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%iv.inc = add nsw i32 %iv, 1
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%becond = icmp ugt i32 %iv.inc, %n
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%or = or i1 %becond, true
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br i1 %or, label %leave, label %loop
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leave:
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ret void
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}
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define void @reversed_or2(i32 %n) {
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; CHECK-LABEL: 'reversed_or2'
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; CHECK-NEXT: Determining loop execution counts for: @reversed_or2
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; CHECK-NEXT: Loop %loop: backedge-taken count is false
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; CHECK-NEXT: Loop %loop: max backedge-taken count is false
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; CHECK-NEXT: Loop %loop: Predicated backedge-taken count is false
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; CHECK-NEXT: Predicates:
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; CHECK: Loop %loop: Trip multiple is 1
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;
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entry:
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br label %loop
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loop:
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%iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ]
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%iv.inc = add nsw i32 %iv, 1
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%becond = icmp ugt i32 %iv.inc, %n
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%or = or i1 true, %becond
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br i1 %or, label %leave, label %loop
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leave:
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ret void
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}
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define void @reversed_or3(i32 %n) {
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; CHECK-LABEL: 'reversed_or3'
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; CHECK-NEXT: Determining loop execution counts for: @reversed_or3
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; CHECK-NEXT: Loop %loop: backedge-taken count is %n
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; CHECK-NEXT: Loop %loop: max backedge-taken count is -1
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; CHECK-NEXT: Loop %loop: Predicated backedge-taken count is %n
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; CHECK-NEXT: Predicates:
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; CHECK: Loop %loop: Trip multiple is 1
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;
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entry:
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br label %loop
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loop:
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%iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ]
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%iv.inc = add nsw i32 %iv, 1
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%becond = icmp ugt i32 %iv.inc, %n
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%or = or i1 false, %becond
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br i1 %or, label %leave, label %loop
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leave:
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ret void
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}
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define void @reversed_or4(i32 %n) {
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; CHECK-LABEL: 'reversed_or4'
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; CHECK-NEXT: Determining loop execution counts for: @reversed_or4
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; CHECK-NEXT: Loop %loop: backedge-taken count is %n
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; CHECK-NEXT: Loop %loop: max backedge-taken count is -1
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; CHECK-NEXT: Loop %loop: Predicated backedge-taken count is %n
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|
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; CHECK-NEXT: Predicates:
|
||
|
|
; CHECK: Loop %loop: Trip multiple is 1
|
||
|
|
;
|
||
|
|
entry:
|
||
|
|
br label %loop
|
||
|
|
|
||
|
|
loop:
|
||
|
|
%iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ]
|
||
|
|
%iv.inc = add nsw i32 %iv, 1
|
||
|
|
%becond = icmp ugt i32 %iv.inc, %n
|
||
|
|
%or = or i1 %becond, false
|
||
|
|
br i1 %or, label %leave, label %loop
|
||
|
|
|
||
|
|
leave:
|
||
|
|
ret void
|
||
|
|
}
|