39 lines
1.5 KiB
LLVM
39 lines
1.5 KiB
LLVM
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; RUN: opt -basic-aa -memoryssa -enable-new-pm=0 -analyze < %s 2>&1 -S | FileCheck %s
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; RUN: opt -aa-pipeline=basic-aa -passes='print<memoryssa>,verify<memoryssa>' -S < %s 2>&1 | FileCheck %s
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;
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; We weren't properly considering the args in callsites in equality or hashing.
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target triple = "armv7-dcg-linux-gnueabi"
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; CHECK-LABEL: define <8 x i16> @vpx_idct32_32_neon
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define <8 x i16> @vpx_idct32_32_neon(i8* %p, <8 x i16> %v) {
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entry:
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; CHECK: MemoryUse(liveOnEntry)
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%load1 = call <8 x i16> @llvm.arm.neon.vld1.v8i16.p0i8(i8* %p, i32 2) #4 ; load CSE replacement
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; CHECK: 1 = MemoryDef(liveOnEntry)
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call void @llvm.arm.neon.vst1.p0i8.v8i16(i8* %p, <8 x i16> %v, i32 2) #4 ; clobber
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%p_next = getelementptr inbounds i8, i8* %p, i32 16
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; CHECK: MemoryUse(liveOnEntry)
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%load2 = call <8 x i16> @llvm.arm.neon.vld1.v8i16.p0i8(i8* %p_next, i32 2) #4 ; non-aliasing load needed to trigger bug
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; CHECK: MemoryUse(1)
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%load3 = call <8 x i16> @llvm.arm.neon.vld1.v8i16.p0i8(i8* %p, i32 2) #4 ; load CSE removed
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%add = add <8 x i16> %load1, %load2
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%ret = add <8 x i16> %add, %load3
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ret <8 x i16> %ret
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}
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; Function Attrs: argmemonly nounwind readonly
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declare <8 x i16> @llvm.arm.neon.vld1.v8i16.p0i8(i8*, i32) #2
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; Function Attrs: argmemonly nounwind
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declare void @llvm.arm.neon.vst1.p0i8.v8i16(i8*, <8 x i16>, i32) #1
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attributes #1 = { argmemonly nounwind }
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attributes #2 = { argmemonly nounwind readonly }
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attributes #3 = { nounwind readnone }
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attributes #4 = { nounwind }
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