137 lines
6.0 KiB
LLVM
137 lines
6.0 KiB
LLVM
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; RUN: opt -S -demanded-bits -analyze -enable-new-pm=0 < %s | FileCheck %s
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; RUN: opt -S -disable-output -passes="print<demanded-bits>" < %s 2>&1 | FileCheck %s
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; CHECK-DAG: DemandedBits: 0xff00 for %x = or <2 x i32> %a, zeroinitializer
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; CHECK-DAG: DemandedBits: 0xff00 for %y = or <2 x i32> %b, zeroinitializer
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; CHECK-DAG: DemandedBits: 0xff00 for %z = or <2 x i32> %x, %y
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; CHECK-DAG: DemandedBits: 0xff for %u = lshr <2 x i32> %z, <i32 8, i32 8>
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; CHECK-DAG: DemandedBits: 0xff for %r = trunc <2 x i32> %u to <2 x i8>
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define <2 x i8> @test_basic(<2 x i32> %a, <2 x i32> %b) {
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%x = or <2 x i32> %a, zeroinitializer
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%y = or <2 x i32> %b, zeroinitializer
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%z = or <2 x i32> %x, %y
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%u = lshr <2 x i32> %z, <i32 8, i32 8>
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%r = trunc <2 x i32> %u to <2 x i8>
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ret <2 x i8> %r
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}
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; Vector-specific instructions
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; CHECK-DAG: DemandedBits: 0xff for %x = or <2 x i32> %a, zeroinitializer
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; CHECK-DAG: DemandedBits: 0xf0 for %z = extractelement <2 x i32> %x, i32 1
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; CHECK-DAG: DemandedBits: 0xf for %y = extractelement <2 x i32> %x, i32 0
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; CHECK-DAG: DemandedBits: 0xffffffff for %u = and i32 %y, 15
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; CHECK-DAG: DemandedBits: 0xffffffff for %v = and i32 %z, 240
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; CHECK-DAG: DemandedBits: 0xffffffff for %r = or i32 %u, %v
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define i32 @test_extractelement(<2 x i32> %a) {
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%x = or <2 x i32> %a, zeroinitializer
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%y = extractelement <2 x i32> %x, i32 0
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%z = extractelement <2 x i32> %x, i32 1
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%u = and i32 %y, 15
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%v = and i32 %z, 240
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%r = or i32 %u, %v
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ret i32 %r
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}
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; CHECK-DAG: DemandedBits: 0xff for %x = or i32 %a, 0
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; CHECK-DAG: DemandedBits: 0xff for %y = or i32 %b, 0
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; CHECK-DAG: DemandedBits: 0xff for %z = insertelement <2 x i32> undef, i32 %x, i32 0
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; CHECK-DAG: DemandedBits: 0xff for %u = insertelement <2 x i32> %z, i32 %y, i32 1
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; CHECK-DAG: DemandedBits: 0xffffffff for %r = and <2 x i32> %u, <i32 255, i32 127>
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define <2 x i32> @test_insertelement(i32 %a, i32 %b) {
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%x = or i32 %a, 0
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%y = or i32 %b, 0
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%z = insertelement <2 x i32> undef, i32 %x, i32 0
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%u = insertelement <2 x i32> %z, i32 %y, i32 1
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%r = and <2 x i32> %u, <i32 255, i32 127>
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ret <2 x i32> %r
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}
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; CHECK-DAG: DemandedBits: 0xff for %x = or <2 x i32> %a, zeroinitializer
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; CHECK-DAG: DemandedBits: 0xff for %y = or <2 x i32> %b, zeroinitializer
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; CHECK-DAG: DemandedBits: 0xff for %z = shufflevector <2 x i32> %x, <2 x i32> %y, <3 x i32> <i32 0, i32 3, i32 1>
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; CHECK-DAG: DemandedBits: 0xffffffff for %r = and <3 x i32> %z, <i32 255, i32 127, i32 0>
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define <3 x i32> @test_shufflevector(<2 x i32> %a, <2 x i32> %b) {
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%x = or <2 x i32> %a, zeroinitializer
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%y = or <2 x i32> %b, zeroinitializer
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%z = shufflevector <2 x i32> %x, <2 x i32> %y, <3 x i32> <i32 0, i32 3, i32 1>
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%r = and <3 x i32> %z, <i32 255, i32 127, i32 0>
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ret <3 x i32> %r
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}
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; Shifts with splat shift amounts
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; CHECK-DAG: DemandedBits: 0xf for %x = or <2 x i32> %a, zeroinitializer
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; CHECK-DAG: DemandedBits: 0xf0 for %y = shl <2 x i32> %x, <i32 4, i32 4>
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; CHECK-DAG: DemandedBits: 0xffffffff for %r = and <2 x i32> %y, <i32 240, i32 240>
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define <2 x i32> @test_shl(<2 x i32> %a) {
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%x = or <2 x i32> %a, zeroinitializer
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%y = shl <2 x i32> %x, <i32 4, i32 4>
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%r = and <2 x i32> %y, <i32 240, i32 240>
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ret <2 x i32> %r
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}
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; CHECK-DAG: DemandedBits: 0xf00 for %x = or <2 x i32> %a, zeroinitializer
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; CHECK-DAG: DemandedBits: 0xf0 for %y = ashr <2 x i32> %x, <i32 4, i32 4>
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; CHECK-DAG: DemandedBits: 0xffffffff for %r = and <2 x i32> %y, <i32 240, i32 240>
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define <2 x i32> @test_ashr(<2 x i32> %a) {
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%x = or <2 x i32> %a, zeroinitializer
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%y = ashr <2 x i32> %x, <i32 4, i32 4>
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%r = and <2 x i32> %y, <i32 240, i32 240>
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ret <2 x i32> %r
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}
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; CHECK-DAG: DemandedBits: 0xf00 for %x = or <2 x i32> %a, zeroinitializer
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; CHECK-DAG: DemandedBits: 0xf0 for %y = lshr <2 x i32> %x, <i32 4, i32 4>
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; CHECK-DAG: DemandedBits: 0xffffffff for %r = and <2 x i32> %y, <i32 240, i32 240>
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define <2 x i32> @test_lshr(<2 x i32> %a) {
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%x = or <2 x i32> %a, zeroinitializer
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%y = lshr <2 x i32> %x, <i32 4, i32 4>
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%r = and <2 x i32> %y, <i32 240, i32 240>
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ret <2 x i32> %r
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}
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declare <2 x i32> @llvm.fshl.i32(<2 x i32>, <2 x i32>, <2 x i32>)
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declare <2 x i32> @llvm.fshr.i32(<2 x i32>, <2 x i32>, <2 x i32>)
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; CHECK-DAG: DemandedBits: 0xf for %x = or <2 x i32> %a, zeroinitializer
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; CHECK-DAG: DemandedBits: 0xf0000000 for %y = or <2 x i32> %b, zeroinitializer
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; CHECK-DAG: DemandedBits: 0xff for %z = call <2 x i32> @llvm.fshl.v2i32(<2 x i32> %x, <2 x i32> %y, <2 x i32> <i32 4, i32 4>)
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; CHECK-DAG: DemandedBits: 0xffffffff for %r = and <2 x i32> %z, <i32 255, i32 255>
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define <2 x i32> @test_fshl(<2 x i32> %a, <2 x i32> %b) {
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%x = or <2 x i32> %a, zeroinitializer
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%y = or <2 x i32> %b, zeroinitializer
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%z = call <2 x i32> @llvm.fshl.i32(<2 x i32> %x, <2 x i32> %y, <2 x i32> <i32 4, i32 4>)
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%r = and <2 x i32> %z, <i32 255, i32 255>
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ret <2 x i32> %r
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}
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; CHECK-DAG: DemandedBits: 0xf for %x = or <2 x i32> %a, zeroinitializer
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; CHECK-DAG: DemandedBits: 0xf0000000 for %y = or <2 x i32> %b, zeroinitializer
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; CHECK-DAG: DemandedBits: 0xff for %z = call <2 x i32> @llvm.fshr.v2i32(<2 x i32> %x, <2 x i32> %y, <2 x i32> <i32 28, i32 28>)
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; CHECK-DAG: DemandedBits: 0xffffffff for %r = and <2 x i32> %z, <i32 255, i32 255>
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define <2 x i32> @test_fshr(<2 x i32> %a, <2 x i32> %b) {
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%x = or <2 x i32> %a, zeroinitializer
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%y = or <2 x i32> %b, zeroinitializer
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%z = call <2 x i32> @llvm.fshr.i32(<2 x i32> %x, <2 x i32> %y, <2 x i32> <i32 28, i32 28>)
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%r = and <2 x i32> %z, <i32 255, i32 255>
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ret <2 x i32> %r
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}
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; FP / Int conversion. These have different input / output types.
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; CHECK-DAG: DemandedBits: 0xffffffff for %x = or <2 x i32> %a, zeroinitializer
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define <2 x float> @test_uitofp(<2 x i32> %a) {
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%x = or <2 x i32> %a, zeroinitializer
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%r = uitofp <2 x i32> %x to <2 x float>
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ret <2 x float> %r
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}
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; CHECK-DAG: DemandedBits: 0xffffffff for %y = fptoui <2 x float> %x to <2 x i32>
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define <2 x i32> @test_fptoui(<2 x float> %a) {
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%x = fadd <2 x float> %a, <float 1.0, float 1.0>
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%y = fptoui <2 x float> %x to <2 x i32>
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%r = and <2 x i32> %y, <i32 255, i32 255>
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ret <2 x i32> %y
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}
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