34 lines
1.4 KiB
LLVM
34 lines
1.4 KiB
LLVM
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; Checks getIntrinsicInstrCost in BasicTTIImpl.h with SVE for CTLZ and CCTZ
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; RUN: opt -cost-model -analyze -mtriple=aarch64--linux-gnu -mattr=+sve < %s 2>%t | FileCheck %s
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; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t
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; If this check fails please read test/CodeGen/AArch64/README for instructions on how to resolve it.
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; WARN-NOT: warning
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; Check for CTLZ
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define void @ctlz_nxv4i32(<vscale x 4 x i32> %A) {
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; CHECK-LABEL: 'ctlz_nxv4i32'
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; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = tail call <vscale x 4 x i32> @llvm.ctlz.nxv4i32(<vscale x 4 x i32> %A, i1 true)
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; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
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%1 = tail call <vscale x 4 x i32> @llvm.ctlz.nxv4i32(<vscale x 4 x i32> %A, i1 true)
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ret void
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}
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; Check for CCTZ
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define void @cttz_nxv4i32(<vscale x 4 x i32> %A) {
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; CHECK-LABEL: 'cttz_nxv4i32'
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; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = tail call <vscale x 4 x i32> @llvm.cttz.nxv4i32(<vscale x 4 x i32> %A, i1 true)
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; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
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%1 = tail call <vscale x 4 x i32> @llvm.cttz.nxv4i32(<vscale x 4 x i32> %A, i1 true)
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ret void
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}
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declare <vscale x 4 x i32> @llvm.ctlz.nxv4i32(<vscale x 4 x i32>, i1)
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declare <vscale x 4 x i32> @llvm.cttz.nxv4i32(<vscale x 4 x i32>, i1)
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