394 lines
14 KiB
C++
394 lines
14 KiB
C++
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//===-- VEAsmPrinter.cpp - VE LLVM assembly writer ------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains a printer that converts from our internal representation
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// of machine-dependent LLVM code to GAS-format VE assembly language.
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//
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//===----------------------------------------------------------------------===//
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#include "MCTargetDesc/VEInstPrinter.h"
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#include "MCTargetDesc/VEMCExpr.h"
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#include "MCTargetDesc/VETargetStreamer.h"
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#include "TargetInfo/VETargetInfo.h"
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#include "VE.h"
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#include "VEInstrInfo.h"
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#include "VETargetMachine.h"
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#include "llvm/CodeGen/AsmPrinter.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineModuleInfoImpls.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
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#include "llvm/IR/Mangler.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCInst.h"
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#include "llvm/MC/MCInstBuilder.h"
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#include "llvm/MC/MCStreamer.h"
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#include "llvm/MC/MCSymbol.h"
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#include "llvm/Support/TargetRegistry.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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#define DEBUG_TYPE "ve-asmprinter"
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namespace {
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class VEAsmPrinter : public AsmPrinter {
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VETargetStreamer &getTargetStreamer() {
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return static_cast<VETargetStreamer &>(*OutStreamer->getTargetStreamer());
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}
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public:
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explicit VEAsmPrinter(TargetMachine &TM, std::unique_ptr<MCStreamer> Streamer)
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: AsmPrinter(TM, std::move(Streamer)) {}
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StringRef getPassName() const override { return "VE Assembly Printer"; }
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void lowerGETGOTAndEmitMCInsts(const MachineInstr *MI,
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const MCSubtargetInfo &STI);
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void lowerGETFunPLTAndEmitMCInsts(const MachineInstr *MI,
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const MCSubtargetInfo &STI);
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void lowerGETTLSAddrAndEmitMCInsts(const MachineInstr *MI,
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const MCSubtargetInfo &STI);
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void emitInstruction(const MachineInstr *MI) override;
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static const char *getRegisterName(unsigned RegNo) {
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return VEInstPrinter::getRegisterName(RegNo);
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}
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void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &OS);
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bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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const char *ExtraCode, raw_ostream &O) override;
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};
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} // end of anonymous namespace
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static MCOperand createVEMCOperand(VEMCExpr::VariantKind Kind, MCSymbol *Sym,
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MCContext &OutContext) {
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const MCSymbolRefExpr *MCSym = MCSymbolRefExpr::create(Sym, OutContext);
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const VEMCExpr *expr = VEMCExpr::create(Kind, MCSym, OutContext);
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return MCOperand::createExpr(expr);
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}
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static MCOperand createGOTRelExprOp(VEMCExpr::VariantKind Kind,
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MCSymbol *GOTLabel, MCContext &OutContext) {
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const MCSymbolRefExpr *GOT = MCSymbolRefExpr::create(GOTLabel, OutContext);
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const VEMCExpr *expr = VEMCExpr::create(Kind, GOT, OutContext);
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return MCOperand::createExpr(expr);
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}
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static void emitSIC(MCStreamer &OutStreamer, MCOperand &RD,
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const MCSubtargetInfo &STI) {
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MCInst SICInst;
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SICInst.setOpcode(VE::SIC);
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SICInst.addOperand(RD);
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OutStreamer.emitInstruction(SICInst, STI);
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}
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static void emitBSIC(MCStreamer &OutStreamer, MCOperand &R1, MCOperand &R2,
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const MCSubtargetInfo &STI) {
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MCInst BSICInst;
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BSICInst.setOpcode(VE::BSICrii);
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BSICInst.addOperand(R1);
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BSICInst.addOperand(R2);
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MCOperand czero = MCOperand::createImm(0);
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BSICInst.addOperand(czero);
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BSICInst.addOperand(czero);
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OutStreamer.emitInstruction(BSICInst, STI);
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}
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static void emitLEAzzi(MCStreamer &OutStreamer, MCOperand &Imm, MCOperand &RD,
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const MCSubtargetInfo &STI) {
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MCInst LEAInst;
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LEAInst.setOpcode(VE::LEAzii);
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LEAInst.addOperand(RD);
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MCOperand CZero = MCOperand::createImm(0);
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LEAInst.addOperand(CZero);
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LEAInst.addOperand(CZero);
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LEAInst.addOperand(Imm);
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OutStreamer.emitInstruction(LEAInst, STI);
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}
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static void emitLEASLzzi(MCStreamer &OutStreamer, MCOperand &Imm, MCOperand &RD,
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const MCSubtargetInfo &STI) {
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MCInst LEASLInst;
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LEASLInst.setOpcode(VE::LEASLzii);
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LEASLInst.addOperand(RD);
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MCOperand CZero = MCOperand::createImm(0);
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LEASLInst.addOperand(CZero);
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LEASLInst.addOperand(CZero);
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LEASLInst.addOperand(Imm);
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OutStreamer.emitInstruction(LEASLInst, STI);
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}
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static void emitLEAzii(MCStreamer &OutStreamer, MCOperand &RS1, MCOperand &Imm,
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MCOperand &RD, const MCSubtargetInfo &STI) {
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MCInst LEAInst;
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LEAInst.setOpcode(VE::LEAzii);
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LEAInst.addOperand(RD);
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MCOperand CZero = MCOperand::createImm(0);
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LEAInst.addOperand(CZero);
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LEAInst.addOperand(RS1);
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LEAInst.addOperand(Imm);
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OutStreamer.emitInstruction(LEAInst, STI);
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}
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static void emitLEASLrri(MCStreamer &OutStreamer, MCOperand &RS1,
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MCOperand &RS2, MCOperand &Imm, MCOperand &RD,
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const MCSubtargetInfo &STI) {
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MCInst LEASLInst;
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LEASLInst.setOpcode(VE::LEASLrri);
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LEASLInst.addOperand(RD);
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LEASLInst.addOperand(RS1);
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LEASLInst.addOperand(RS2);
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LEASLInst.addOperand(Imm);
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OutStreamer.emitInstruction(LEASLInst, STI);
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}
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static void emitBinary(MCStreamer &OutStreamer, unsigned Opcode, MCOperand &RS1,
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MCOperand &Src2, MCOperand &RD,
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const MCSubtargetInfo &STI) {
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MCInst Inst;
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Inst.setOpcode(Opcode);
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Inst.addOperand(RD);
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Inst.addOperand(RS1);
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Inst.addOperand(Src2);
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OutStreamer.emitInstruction(Inst, STI);
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}
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static void emitANDrm(MCStreamer &OutStreamer, MCOperand &RS1, MCOperand &Imm,
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MCOperand &RD, const MCSubtargetInfo &STI) {
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emitBinary(OutStreamer, VE::ANDrm, RS1, Imm, RD, STI);
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}
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static void emitHiLo(MCStreamer &OutStreamer, MCSymbol *GOTSym,
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VEMCExpr::VariantKind HiKind, VEMCExpr::VariantKind LoKind,
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MCOperand &RD, MCContext &OutContext,
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const MCSubtargetInfo &STI) {
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MCOperand hi = createVEMCOperand(HiKind, GOTSym, OutContext);
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MCOperand lo = createVEMCOperand(LoKind, GOTSym, OutContext);
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emitLEAzzi(OutStreamer, lo, RD, STI);
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MCOperand M032 = MCOperand::createImm(M0(32));
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emitANDrm(OutStreamer, RD, M032, RD, STI);
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emitLEASLzzi(OutStreamer, hi, RD, STI);
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}
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void VEAsmPrinter::lowerGETGOTAndEmitMCInsts(const MachineInstr *MI,
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const MCSubtargetInfo &STI) {
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MCSymbol *GOTLabel =
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OutContext.getOrCreateSymbol(Twine("_GLOBAL_OFFSET_TABLE_"));
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const MachineOperand &MO = MI->getOperand(0);
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MCOperand MCRegOP = MCOperand::createReg(MO.getReg());
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if (!isPositionIndependent()) {
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// Just load the address of GOT to MCRegOP.
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switch (TM.getCodeModel()) {
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default:
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llvm_unreachable("Unsupported absolute code model");
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case CodeModel::Small:
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case CodeModel::Medium:
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case CodeModel::Large:
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emitHiLo(*OutStreamer, GOTLabel, VEMCExpr::VK_VE_HI32,
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VEMCExpr::VK_VE_LO32, MCRegOP, OutContext, STI);
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break;
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}
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return;
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}
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MCOperand RegGOT = MCOperand::createReg(VE::SX15); // GOT
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MCOperand RegPLT = MCOperand::createReg(VE::SX16); // PLT
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// lea %got, _GLOBAL_OFFSET_TABLE_@PC_LO(-24)
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// and %got, %got, (32)0
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// sic %plt
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// lea.sl %got, _GLOBAL_OFFSET_TABLE_@PC_HI(%plt, %got)
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MCOperand cim24 = MCOperand::createImm(-24);
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MCOperand loImm =
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createGOTRelExprOp(VEMCExpr::VK_VE_PC_LO32, GOTLabel, OutContext);
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emitLEAzii(*OutStreamer, cim24, loImm, MCRegOP, STI);
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MCOperand M032 = MCOperand::createImm(M0(32));
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emitANDrm(*OutStreamer, MCRegOP, M032, MCRegOP, STI);
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emitSIC(*OutStreamer, RegPLT, STI);
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MCOperand hiImm =
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createGOTRelExprOp(VEMCExpr::VK_VE_PC_HI32, GOTLabel, OutContext);
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emitLEASLrri(*OutStreamer, RegGOT, RegPLT, hiImm, MCRegOP, STI);
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}
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void VEAsmPrinter::lowerGETFunPLTAndEmitMCInsts(const MachineInstr *MI,
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const MCSubtargetInfo &STI) {
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const MachineOperand &MO = MI->getOperand(0);
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MCOperand MCRegOP = MCOperand::createReg(MO.getReg());
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const MachineOperand &Addr = MI->getOperand(1);
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MCSymbol *AddrSym = nullptr;
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switch (Addr.getType()) {
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default:
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llvm_unreachable("<unknown operand type>");
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return;
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case MachineOperand::MO_MachineBasicBlock:
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report_fatal_error("MBB is not supported yet");
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return;
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case MachineOperand::MO_ConstantPoolIndex:
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report_fatal_error("ConstantPool is not supported yet");
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return;
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case MachineOperand::MO_ExternalSymbol:
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AddrSym = GetExternalSymbolSymbol(Addr.getSymbolName());
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break;
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case MachineOperand::MO_GlobalAddress:
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AddrSym = getSymbol(Addr.getGlobal());
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break;
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}
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if (!isPositionIndependent()) {
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llvm_unreachable("Unsupported uses of %plt in not PIC code");
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return;
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}
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MCOperand RegPLT = MCOperand::createReg(VE::SX16); // PLT
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// lea %dst, func@plt_lo(-24)
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// and %dst, %dst, (32)0
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// sic %plt ; FIXME: is it safe to use %plt here?
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// lea.sl %dst, func@plt_hi(%plt, %dst)
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MCOperand cim24 = MCOperand::createImm(-24);
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MCOperand loImm =
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createGOTRelExprOp(VEMCExpr::VK_VE_PLT_LO32, AddrSym, OutContext);
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emitLEAzii(*OutStreamer, cim24, loImm, MCRegOP, STI);
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MCOperand M032 = MCOperand::createImm(M0(32));
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emitANDrm(*OutStreamer, MCRegOP, M032, MCRegOP, STI);
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emitSIC(*OutStreamer, RegPLT, STI);
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MCOperand hiImm =
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createGOTRelExprOp(VEMCExpr::VK_VE_PLT_HI32, AddrSym, OutContext);
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emitLEASLrri(*OutStreamer, MCRegOP, RegPLT, hiImm, MCRegOP, STI);
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}
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void VEAsmPrinter::lowerGETTLSAddrAndEmitMCInsts(const MachineInstr *MI,
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const MCSubtargetInfo &STI) {
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const MachineOperand &Addr = MI->getOperand(0);
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MCSymbol *AddrSym = nullptr;
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switch (Addr.getType()) {
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default:
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llvm_unreachable("<unknown operand type>");
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return;
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case MachineOperand::MO_MachineBasicBlock:
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report_fatal_error("MBB is not supported yet");
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return;
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case MachineOperand::MO_ConstantPoolIndex:
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report_fatal_error("ConstantPool is not supported yet");
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return;
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case MachineOperand::MO_ExternalSymbol:
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AddrSym = GetExternalSymbolSymbol(Addr.getSymbolName());
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break;
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case MachineOperand::MO_GlobalAddress:
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AddrSym = getSymbol(Addr.getGlobal());
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break;
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}
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MCOperand RegLR = MCOperand::createReg(VE::SX10); // LR
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MCOperand RegS0 = MCOperand::createReg(VE::SX0); // S0
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MCOperand RegS12 = MCOperand::createReg(VE::SX12); // S12
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MCSymbol *GetTLSLabel = OutContext.getOrCreateSymbol(Twine("__tls_get_addr"));
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// lea %s0, sym@tls_gd_lo(-24)
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// and %s0, %s0, (32)0
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// sic %lr
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// lea.sl %s0, sym@tls_gd_hi(%lr, %s0)
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// lea %s12, __tls_get_addr@plt_lo(8)
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// and %s12, %s12, (32)0
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// lea.sl %s12, __tls_get_addr@plt_hi(%s12, %lr)
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// bsic %lr, (, %s12)
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MCOperand cim24 = MCOperand::createImm(-24);
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MCOperand loImm =
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createGOTRelExprOp(VEMCExpr::VK_VE_TLS_GD_LO32, AddrSym, OutContext);
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emitLEAzii(*OutStreamer, cim24, loImm, RegS0, STI);
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MCOperand M032 = MCOperand::createImm(M0(32));
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emitANDrm(*OutStreamer, RegS0, M032, RegS0, STI);
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emitSIC(*OutStreamer, RegLR, STI);
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MCOperand hiImm =
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createGOTRelExprOp(VEMCExpr::VK_VE_TLS_GD_HI32, AddrSym, OutContext);
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emitLEASLrri(*OutStreamer, RegS0, RegLR, hiImm, RegS0, STI);
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MCOperand ci8 = MCOperand::createImm(8);
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MCOperand loImm2 =
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createGOTRelExprOp(VEMCExpr::VK_VE_PLT_LO32, GetTLSLabel, OutContext);
|
||
|
|
emitLEAzii(*OutStreamer, ci8, loImm2, RegS12, STI);
|
||
|
|
emitANDrm(*OutStreamer, RegS12, M032, RegS12, STI);
|
||
|
|
MCOperand hiImm2 =
|
||
|
|
createGOTRelExprOp(VEMCExpr::VK_VE_PLT_HI32, GetTLSLabel, OutContext);
|
||
|
|
emitLEASLrri(*OutStreamer, RegS12, RegLR, hiImm2, RegS12, STI);
|
||
|
|
emitBSIC(*OutStreamer, RegLR, RegS12, STI);
|
||
|
|
}
|
||
|
|
|
||
|
|
void VEAsmPrinter::emitInstruction(const MachineInstr *MI) {
|
||
|
|
|
||
|
|
switch (MI->getOpcode()) {
|
||
|
|
default:
|
||
|
|
break;
|
||
|
|
case TargetOpcode::DBG_VALUE:
|
||
|
|
// FIXME: Debug Value.
|
||
|
|
return;
|
||
|
|
case VE::GETGOT:
|
||
|
|
lowerGETGOTAndEmitMCInsts(MI, getSubtargetInfo());
|
||
|
|
return;
|
||
|
|
case VE::GETFUNPLT:
|
||
|
|
lowerGETFunPLTAndEmitMCInsts(MI, getSubtargetInfo());
|
||
|
|
return;
|
||
|
|
case VE::GETTLSADDR:
|
||
|
|
lowerGETTLSAddrAndEmitMCInsts(MI, getSubtargetInfo());
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
|
||
|
|
MachineBasicBlock::const_instr_iterator I = MI->getIterator();
|
||
|
|
MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end();
|
||
|
|
do {
|
||
|
|
MCInst TmpInst;
|
||
|
|
LowerVEMachineInstrToMCInst(&*I, TmpInst, *this);
|
||
|
|
EmitToStreamer(*OutStreamer, TmpInst);
|
||
|
|
} while ((++I != E) && I->isInsideBundle()); // Delay slot check.
|
||
|
|
}
|
||
|
|
|
||
|
|
void VEAsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
|
||
|
|
raw_ostream &O) {
|
||
|
|
const MachineOperand &MO = MI->getOperand(OpNum);
|
||
|
|
|
||
|
|
switch (MO.getType()) {
|
||
|
|
case MachineOperand::MO_Register:
|
||
|
|
O << "%" << StringRef(getRegisterName(MO.getReg())).lower();
|
||
|
|
break;
|
||
|
|
default:
|
||
|
|
llvm_unreachable("<unknown operand type>");
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
// PrintAsmOperand - Print out an operand for an inline asm expression.
|
||
|
|
bool VEAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
|
||
|
|
const char *ExtraCode, raw_ostream &O) {
|
||
|
|
if (ExtraCode && ExtraCode[0]) {
|
||
|
|
if (ExtraCode[1] != 0)
|
||
|
|
return true; // Unknown modifier.
|
||
|
|
|
||
|
|
switch (ExtraCode[0]) {
|
||
|
|
default:
|
||
|
|
// See if this is a generic print operand
|
||
|
|
return AsmPrinter::PrintAsmOperand(MI, OpNo, ExtraCode, O);
|
||
|
|
case 'r':
|
||
|
|
case 'v':
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
printOperand(MI, OpNo, O);
|
||
|
|
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
|
||
|
|
// Force static initialization.
|
||
|
|
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeVEAsmPrinter() {
|
||
|
|
RegisterAsmPrinter<VEAsmPrinter> X(getTheVETarget());
|
||
|
|
}
|