464 lines
15 KiB
C++
464 lines
15 KiB
C++
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//=-- SystemZHazardRecognizer.h - SystemZ Hazard Recognizer -----*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines a hazard recognizer for the SystemZ scheduler.
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//
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// This class is used by the SystemZ scheduling strategy to maintain
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// the state during scheduling, and provide cost functions for
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// scheduling candidates. This includes:
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//
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// * Decoder grouping. A decoder group can maximally hold 3 uops, and
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// instructions that always begin a new group should be scheduled when
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// the current decoder group is empty.
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// * Processor resources usage. It is beneficial to balance the use of
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// resources.
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//
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// A goal is to consider all instructions, also those outside of any
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// scheduling region. Such instructions are "advanced" past and include
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// single instructions before a scheduling region, branches etc.
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//
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// A block that has only one predecessor continues scheduling with the state
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// of it (which may be updated by emitting branches).
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//
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// ===---------------------------------------------------------------------===//
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#include "SystemZHazardRecognizer.h"
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#include "llvm/ADT/Statistic.h"
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using namespace llvm;
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#define DEBUG_TYPE "machine-scheduler"
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// This is the limit of processor resource usage at which the
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// scheduler should try to look for other instructions (not using the
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// critical resource).
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static cl::opt<int> ProcResCostLim("procres-cost-lim", cl::Hidden,
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cl::desc("The OOO window for processor "
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"resources during scheduling."),
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cl::init(8));
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unsigned SystemZHazardRecognizer::
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getNumDecoderSlots(SUnit *SU) const {
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const MCSchedClassDesc *SC = getSchedClass(SU);
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if (!SC->isValid())
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return 0; // IMPLICIT_DEF / KILL -- will not make impact in output.
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assert((SC->NumMicroOps != 2 || (SC->BeginGroup && !SC->EndGroup)) &&
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"Only cracked instruction can have 2 uops.");
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assert((SC->NumMicroOps < 3 || (SC->BeginGroup && SC->EndGroup)) &&
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"Expanded instructions always group alone.");
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assert((SC->NumMicroOps < 3 || (SC->NumMicroOps % 3 == 0)) &&
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"Expanded instructions fill the group(s).");
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return SC->NumMicroOps;
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}
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unsigned SystemZHazardRecognizer::getCurrCycleIdx(SUnit *SU) const {
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unsigned Idx = CurrGroupSize;
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if (GrpCount % 2)
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Idx += 3;
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if (SU != nullptr && !fitsIntoCurrentGroup(SU)) {
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if (Idx == 1 || Idx == 2)
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Idx = 3;
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else if (Idx == 4 || Idx == 5)
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Idx = 0;
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}
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return Idx;
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}
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ScheduleHazardRecognizer::HazardType SystemZHazardRecognizer::
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getHazardType(SUnit *SU, int Stalls) {
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return (fitsIntoCurrentGroup(SU) ? NoHazard : Hazard);
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}
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void SystemZHazardRecognizer::Reset() {
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CurrGroupSize = 0;
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CurrGroupHas4RegOps = false;
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clearProcResCounters();
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GrpCount = 0;
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LastFPdOpCycleIdx = UINT_MAX;
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LastEmittedMI = nullptr;
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LLVM_DEBUG(CurGroupDbg = "";);
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}
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bool
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SystemZHazardRecognizer::fitsIntoCurrentGroup(SUnit *SU) const {
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const MCSchedClassDesc *SC = getSchedClass(SU);
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if (!SC->isValid())
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return true;
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// A cracked instruction only fits into schedule if the current
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// group is empty.
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if (SC->BeginGroup)
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return (CurrGroupSize == 0);
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// An instruction with 4 register operands will not fit in last slot.
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assert ((CurrGroupSize < 2 || !CurrGroupHas4RegOps) &&
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"Current decoder group is already full!");
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if (CurrGroupSize == 2 && has4RegOps(SU->getInstr()))
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return false;
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// Since a full group is handled immediately in EmitInstruction(),
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// SU should fit into current group. NumSlots should be 1 or 0,
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// since it is not a cracked or expanded instruction.
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assert ((getNumDecoderSlots(SU) <= 1) && (CurrGroupSize < 3) &&
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"Expected normal instruction to fit in non-full group!");
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return true;
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}
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bool SystemZHazardRecognizer::has4RegOps(const MachineInstr *MI) const {
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const MachineFunction &MF = *MI->getParent()->getParent();
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const TargetRegisterInfo *TRI = &TII->getRegisterInfo();
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const MCInstrDesc &MID = MI->getDesc();
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unsigned Count = 0;
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for (unsigned OpIdx = 0; OpIdx < MID.getNumOperands(); OpIdx++) {
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const TargetRegisterClass *RC = TII->getRegClass(MID, OpIdx, TRI, MF);
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if (RC == nullptr)
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continue;
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if (OpIdx >= MID.getNumDefs() &&
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MID.getOperandConstraint(OpIdx, MCOI::TIED_TO) != -1)
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continue;
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Count++;
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}
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return Count >= 4;
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}
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void SystemZHazardRecognizer::nextGroup() {
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if (CurrGroupSize == 0)
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return;
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LLVM_DEBUG(dumpCurrGroup("Completed decode group"));
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LLVM_DEBUG(CurGroupDbg = "";);
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int NumGroups = ((CurrGroupSize > 3) ? (CurrGroupSize / 3) : 1);
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assert((CurrGroupSize <= 3 || CurrGroupSize % 3 == 0) &&
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"Current decoder group bad.");
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// Reset counter for next group.
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CurrGroupSize = 0;
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CurrGroupHas4RegOps = false;
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GrpCount += ((unsigned) NumGroups);
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// Decrease counters for execution units.
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for (unsigned i = 0; i < SchedModel->getNumProcResourceKinds(); ++i)
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ProcResourceCounters[i] = ((ProcResourceCounters[i] > NumGroups)
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? (ProcResourceCounters[i] - NumGroups)
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: 0);
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// Clear CriticalResourceIdx if it is now below the threshold.
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if (CriticalResourceIdx != UINT_MAX &&
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(ProcResourceCounters[CriticalResourceIdx] <=
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ProcResCostLim))
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CriticalResourceIdx = UINT_MAX;
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LLVM_DEBUG(dumpState(););
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}
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#ifndef NDEBUG // Debug output
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void SystemZHazardRecognizer::dumpSU(SUnit *SU, raw_ostream &OS) const {
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OS << "SU(" << SU->NodeNum << "):";
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OS << TII->getName(SU->getInstr()->getOpcode());
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const MCSchedClassDesc *SC = getSchedClass(SU);
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if (!SC->isValid())
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return;
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for (TargetSchedModel::ProcResIter
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PI = SchedModel->getWriteProcResBegin(SC),
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PE = SchedModel->getWriteProcResEnd(SC); PI != PE; ++PI) {
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const MCProcResourceDesc &PRD =
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*SchedModel->getProcResource(PI->ProcResourceIdx);
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std::string FU(PRD.Name);
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// trim e.g. Z13_FXaUnit -> FXa
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FU = FU.substr(FU.find('_') + 1);
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size_t Pos = FU.find("Unit");
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if (Pos != std::string::npos)
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FU.resize(Pos);
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if (FU == "LS") // LSUnit -> LSU
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FU = "LSU";
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OS << "/" << FU;
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if (PI->Cycles > 1)
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OS << "(" << PI->Cycles << "cyc)";
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}
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if (SC->NumMicroOps > 1)
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OS << "/" << SC->NumMicroOps << "uops";
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if (SC->BeginGroup && SC->EndGroup)
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OS << "/GroupsAlone";
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else if (SC->BeginGroup)
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OS << "/BeginsGroup";
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else if (SC->EndGroup)
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OS << "/EndsGroup";
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if (SU->isUnbuffered)
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OS << "/Unbuffered";
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if (has4RegOps(SU->getInstr()))
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OS << "/4RegOps";
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}
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void SystemZHazardRecognizer::dumpCurrGroup(std::string Msg) const {
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dbgs() << "++ " << Msg;
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dbgs() << ": ";
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if (CurGroupDbg.empty())
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dbgs() << " <empty>\n";
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else {
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dbgs() << "{ " << CurGroupDbg << " }";
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dbgs() << " (" << CurrGroupSize << " decoder slot"
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<< (CurrGroupSize > 1 ? "s":"")
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<< (CurrGroupHas4RegOps ? ", 4RegOps" : "")
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<< ")\n";
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}
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}
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void SystemZHazardRecognizer::dumpProcResourceCounters() const {
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bool any = false;
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for (unsigned i = 0; i < SchedModel->getNumProcResourceKinds(); ++i)
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if (ProcResourceCounters[i] > 0) {
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any = true;
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break;
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}
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if (!any)
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return;
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dbgs() << "++ | Resource counters: ";
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for (unsigned i = 0; i < SchedModel->getNumProcResourceKinds(); ++i)
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if (ProcResourceCounters[i] > 0)
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dbgs() << SchedModel->getProcResource(i)->Name
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<< ":" << ProcResourceCounters[i] << " ";
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dbgs() << "\n";
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if (CriticalResourceIdx != UINT_MAX)
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dbgs() << "++ | Critical resource: "
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<< SchedModel->getProcResource(CriticalResourceIdx)->Name
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<< "\n";
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}
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void SystemZHazardRecognizer::dumpState() const {
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dumpCurrGroup("| Current decoder group");
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dbgs() << "++ | Current cycle index: "
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<< getCurrCycleIdx() << "\n";
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dumpProcResourceCounters();
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if (LastFPdOpCycleIdx != UINT_MAX)
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dbgs() << "++ | Last FPd cycle index: " << LastFPdOpCycleIdx << "\n";
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}
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#endif //NDEBUG
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void SystemZHazardRecognizer::clearProcResCounters() {
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ProcResourceCounters.assign(SchedModel->getNumProcResourceKinds(), 0);
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CriticalResourceIdx = UINT_MAX;
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}
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static inline bool isBranchRetTrap(MachineInstr *MI) {
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return (MI->isBranch() || MI->isReturn() ||
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MI->getOpcode() == SystemZ::CondTrap);
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}
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// Update state with SU as the next scheduled unit.
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void SystemZHazardRecognizer::
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EmitInstruction(SUnit *SU) {
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const MCSchedClassDesc *SC = getSchedClass(SU);
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LLVM_DEBUG(dbgs() << "++ HazardRecognizer emitting "; dumpSU(SU, dbgs());
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dbgs() << "\n";);
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LLVM_DEBUG(dumpCurrGroup("Decode group before emission"););
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// If scheduling an SU that must begin a new decoder group, move on
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// to next group.
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if (!fitsIntoCurrentGroup(SU))
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nextGroup();
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LLVM_DEBUG(raw_string_ostream cgd(CurGroupDbg);
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if (CurGroupDbg.length()) cgd << ", "; dumpSU(SU, cgd););
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LastEmittedMI = SU->getInstr();
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// After returning from a call, we don't know much about the state.
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if (SU->isCall) {
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LLVM_DEBUG(dbgs() << "++ Clearing state after call.\n";);
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Reset();
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LastEmittedMI = SU->getInstr();
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return;
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}
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// Increase counter for execution unit(s).
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for (TargetSchedModel::ProcResIter
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PI = SchedModel->getWriteProcResBegin(SC),
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PE = SchedModel->getWriteProcResEnd(SC); PI != PE; ++PI) {
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// Don't handle FPd together with the other resources.
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if (SchedModel->getProcResource(PI->ProcResourceIdx)->BufferSize == 1)
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continue;
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int &CurrCounter =
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ProcResourceCounters[PI->ProcResourceIdx];
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CurrCounter += PI->Cycles;
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// Check if this is now the new critical resource.
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if ((CurrCounter > ProcResCostLim) &&
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(CriticalResourceIdx == UINT_MAX ||
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(PI->ProcResourceIdx != CriticalResourceIdx &&
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CurrCounter >
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ProcResourceCounters[CriticalResourceIdx]))) {
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LLVM_DEBUG(
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dbgs() << "++ New critical resource: "
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<< SchedModel->getProcResource(PI->ProcResourceIdx)->Name
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<< "\n";);
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CriticalResourceIdx = PI->ProcResourceIdx;
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}
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}
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// Make note of an instruction that uses a blocking resource (FPd).
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if (SU->isUnbuffered) {
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LastFPdOpCycleIdx = getCurrCycleIdx(SU);
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LLVM_DEBUG(dbgs() << "++ Last FPd cycle index: " << LastFPdOpCycleIdx
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<< "\n";);
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}
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// Insert SU into current group by increasing number of slots used
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// in current group.
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CurrGroupSize += getNumDecoderSlots(SU);
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CurrGroupHas4RegOps |= has4RegOps(SU->getInstr());
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unsigned GroupLim = (CurrGroupHas4RegOps ? 2 : 3);
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assert((CurrGroupSize <= GroupLim || CurrGroupSize == getNumDecoderSlots(SU))
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&& "SU does not fit into decoder group!");
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// Check if current group is now full/ended. If so, move on to next
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// group to be ready to evaluate more candidates.
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if (CurrGroupSize >= GroupLim || SC->EndGroup)
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nextGroup();
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}
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int SystemZHazardRecognizer::groupingCost(SUnit *SU) const {
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const MCSchedClassDesc *SC = getSchedClass(SU);
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if (!SC->isValid())
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return 0;
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// If SU begins new group, it can either break a current group early
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// or fit naturally if current group is empty (negative cost).
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if (SC->BeginGroup) {
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if (CurrGroupSize)
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return 3 - CurrGroupSize;
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return -1;
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}
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// Similarly, a group-ending SU may either fit well (last in group), or
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// end the group prematurely.
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if (SC->EndGroup) {
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unsigned resultingGroupSize =
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(CurrGroupSize + getNumDecoderSlots(SU));
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if (resultingGroupSize < 3)
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return (3 - resultingGroupSize);
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return -1;
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}
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// An instruction with 4 register operands will not fit in last slot.
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if (CurrGroupSize == 2 && has4RegOps(SU->getInstr()))
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return 1;
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||
|
|
|
||
|
|
// Most instructions can be placed in any decoder slot.
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
bool SystemZHazardRecognizer::isFPdOpPreferred_distance(SUnit *SU) const {
|
||
|
|
assert (SU->isUnbuffered);
|
||
|
|
// If this is the first FPd op, it should be scheduled high.
|
||
|
|
if (LastFPdOpCycleIdx == UINT_MAX)
|
||
|
|
return true;
|
||
|
|
// If this is not the first PFd op, it should go into the other side
|
||
|
|
// of the processor to use the other FPd unit there. This should
|
||
|
|
// generally happen if two FPd ops are placed with 2 other
|
||
|
|
// instructions between them (modulo 6).
|
||
|
|
unsigned SUCycleIdx = getCurrCycleIdx(SU);
|
||
|
|
if (LastFPdOpCycleIdx > SUCycleIdx)
|
||
|
|
return ((LastFPdOpCycleIdx - SUCycleIdx) == 3);
|
||
|
|
return ((SUCycleIdx - LastFPdOpCycleIdx) == 3);
|
||
|
|
}
|
||
|
|
|
||
|
|
int SystemZHazardRecognizer::
|
||
|
|
resourcesCost(SUnit *SU) {
|
||
|
|
int Cost = 0;
|
||
|
|
|
||
|
|
const MCSchedClassDesc *SC = getSchedClass(SU);
|
||
|
|
if (!SC->isValid())
|
||
|
|
return 0;
|
||
|
|
|
||
|
|
// For a FPd op, either return min or max value as indicated by the
|
||
|
|
// distance to any prior FPd op.
|
||
|
|
if (SU->isUnbuffered)
|
||
|
|
Cost = (isFPdOpPreferred_distance(SU) ? INT_MIN : INT_MAX);
|
||
|
|
// For other instructions, give a cost to the use of the critical resource.
|
||
|
|
else if (CriticalResourceIdx != UINT_MAX) {
|
||
|
|
for (TargetSchedModel::ProcResIter
|
||
|
|
PI = SchedModel->getWriteProcResBegin(SC),
|
||
|
|
PE = SchedModel->getWriteProcResEnd(SC); PI != PE; ++PI)
|
||
|
|
if (PI->ProcResourceIdx == CriticalResourceIdx)
|
||
|
|
Cost = PI->Cycles;
|
||
|
|
}
|
||
|
|
|
||
|
|
return Cost;
|
||
|
|
}
|
||
|
|
|
||
|
|
void SystemZHazardRecognizer::emitInstruction(MachineInstr *MI,
|
||
|
|
bool TakenBranch) {
|
||
|
|
// Make a temporary SUnit.
|
||
|
|
SUnit SU(MI, 0);
|
||
|
|
|
||
|
|
// Set interesting flags.
|
||
|
|
SU.isCall = MI->isCall();
|
||
|
|
|
||
|
|
const MCSchedClassDesc *SC = SchedModel->resolveSchedClass(MI);
|
||
|
|
for (const MCWriteProcResEntry &PRE :
|
||
|
|
make_range(SchedModel->getWriteProcResBegin(SC),
|
||
|
|
SchedModel->getWriteProcResEnd(SC))) {
|
||
|
|
switch (SchedModel->getProcResource(PRE.ProcResourceIdx)->BufferSize) {
|
||
|
|
case 0:
|
||
|
|
SU.hasReservedResource = true;
|
||
|
|
break;
|
||
|
|
case 1:
|
||
|
|
SU.isUnbuffered = true;
|
||
|
|
break;
|
||
|
|
default:
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
unsigned GroupSizeBeforeEmit = CurrGroupSize;
|
||
|
|
EmitInstruction(&SU);
|
||
|
|
|
||
|
|
if (!TakenBranch && isBranchRetTrap(MI)) {
|
||
|
|
// NT Branch on second slot ends group.
|
||
|
|
if (GroupSizeBeforeEmit == 1)
|
||
|
|
nextGroup();
|
||
|
|
}
|
||
|
|
|
||
|
|
if (TakenBranch && CurrGroupSize > 0)
|
||
|
|
nextGroup();
|
||
|
|
|
||
|
|
assert ((!MI->isTerminator() || isBranchRetTrap(MI)) &&
|
||
|
|
"Scheduler: unhandled terminator!");
|
||
|
|
}
|
||
|
|
|
||
|
|
void SystemZHazardRecognizer::
|
||
|
|
copyState(SystemZHazardRecognizer *Incoming) {
|
||
|
|
// Current decoder group
|
||
|
|
CurrGroupSize = Incoming->CurrGroupSize;
|
||
|
|
LLVM_DEBUG(CurGroupDbg = Incoming->CurGroupDbg;);
|
||
|
|
|
||
|
|
// Processor resources
|
||
|
|
ProcResourceCounters = Incoming->ProcResourceCounters;
|
||
|
|
CriticalResourceIdx = Incoming->CriticalResourceIdx;
|
||
|
|
|
||
|
|
// FPd
|
||
|
|
LastFPdOpCycleIdx = Incoming->LastFPdOpCycleIdx;
|
||
|
|
GrpCount = Incoming->GrpCount;
|
||
|
|
}
|