499 lines
19 KiB
C++
499 lines
19 KiB
C++
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//===- ARCFrameLowering.cpp - ARC Frame Information -------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the ARC implementation of the TargetFrameLowering class.
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//
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//===----------------------------------------------------------------------===//
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#include "ARCFrameLowering.h"
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#include "ARCMachineFunctionInfo.h"
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#include "ARCSubtarget.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/CodeGen/RegisterScavenging.h"
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#include "llvm/CodeGen/TargetRegisterInfo.h"
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#include "llvm/IR/Function.h"
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#include "llvm/Support/Debug.h"
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#define DEBUG_TYPE "arc-frame-lowering"
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using namespace llvm;
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static cl::opt<bool>
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UseSaveRestoreFunclet("arc-save-restore-funclet", cl::Hidden,
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cl::desc("Use arc callee save/restore functions"),
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cl::init(true));
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static const char *store_funclet_name[] = {
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"__st_r13_to_r15", "__st_r13_to_r16", "__st_r13_to_r17", "__st_r13_to_r18",
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"__st_r13_to_r19", "__st_r13_to_r20", "__st_r13_to_r21", "__st_r13_to_r22",
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"__st_r13_to_r23", "__st_r13_to_r24", "__st_r13_to_r25",
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};
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static const char *load_funclet_name[] = {
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"__ld_r13_to_r15", "__ld_r13_to_r16", "__ld_r13_to_r17", "__ld_r13_to_r18",
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"__ld_r13_to_r19", "__ld_r13_to_r20", "__ld_r13_to_r21", "__ld_r13_to_r22",
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"__ld_r13_to_r23", "__ld_r13_to_r24", "__ld_r13_to_r25",
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};
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static void generateStackAdjustment(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI,
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const ARCInstrInfo &TII, DebugLoc dl,
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int Amount, int StackPtr) {
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unsigned AdjOp;
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if (!Amount)
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return;
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bool Positive;
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unsigned AbsAmount;
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if (Amount < 0) {
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AbsAmount = -Amount;
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Positive = false;
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} else {
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AbsAmount = Amount;
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Positive = true;
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}
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LLVM_DEBUG(dbgs() << "Internal: adjust stack by: " << Amount << ","
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<< AbsAmount << "\n");
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assert((AbsAmount % 4 == 0) && "Stack adjustments must be 4-byte aligned.");
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if (isUInt<6>(AbsAmount))
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AdjOp = Positive ? ARC::ADD_rru6 : ARC::SUB_rru6;
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else if (isInt<12>(AbsAmount))
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AdjOp = Positive ? ARC::ADD_rrs12 : ARC::SUB_rrs12;
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else
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AdjOp = Positive ? ARC::ADD_rrlimm : ARC::SUB_rrlimm;
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BuildMI(MBB, MBBI, dl, TII.get(AdjOp), StackPtr)
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.addReg(StackPtr)
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.addImm(AbsAmount);
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}
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static unsigned determineLastCalleeSave(ArrayRef<CalleeSavedInfo> CSI) {
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unsigned Last = 0;
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for (auto Reg : CSI) {
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assert(Reg.getReg() >= ARC::R13 && Reg.getReg() <= ARC::R25 &&
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"Unexpected callee saved reg.");
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if (Reg.getReg() > Last)
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Last = Reg.getReg();
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}
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return Last;
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}
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void ARCFrameLowering::determineCalleeSaves(MachineFunction &MF,
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BitVector &SavedRegs,
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RegScavenger *RS) const {
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LLVM_DEBUG(dbgs() << "Determine Callee Saves: " << MF.getName() << "\n");
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TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
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SavedRegs.set(ARC::BLINK);
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}
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void ARCFrameLowering::adjustStackToMatchRecords(
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MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
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bool Allocate) const {
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MachineFunction &MF = *MBB.getParent();
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int ScalarAlloc = MF.getFrameInfo().getStackSize();
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if (Allocate) {
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// Allocate by adjusting by the negative of what the record holder tracked
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// it tracked a positive offset in a downward growing stack.
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ScalarAlloc = -ScalarAlloc;
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}
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generateStackAdjustment(MBB, MBBI, *ST.getInstrInfo(), DebugLoc(),
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ScalarAlloc, ARC::SP);
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}
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/// Insert prolog code into the function.
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/// For ARC, this inserts a call to a function that puts required callee saved
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/// registers onto the stack, when enough callee saved registers are required.
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void ARCFrameLowering::emitPrologue(MachineFunction &MF,
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MachineBasicBlock &MBB) const {
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LLVM_DEBUG(dbgs() << "Emit Prologue: " << MF.getName() << "\n");
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auto *AFI = MF.getInfo<ARCFunctionInfo>();
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MachineModuleInfo &MMI = MF.getMMI();
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MCContext &Context = MMI.getContext();
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const MCRegisterInfo *MRI = Context.getRegisterInfo();
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const ARCInstrInfo *TII = MF.getSubtarget<ARCSubtarget>().getInstrInfo();
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MachineBasicBlock::iterator MBBI = MBB.begin();
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// Debug location must be unknown since the first debug location is used
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// to determine the end of the prologue.
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DebugLoc dl;
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MachineFrameInfo &MFI = MF.getFrameInfo();
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const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
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unsigned Last = determineLastCalleeSave(CSI);
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unsigned StackSlotsUsedByFunclet = 0;
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bool SavedBlink = false;
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unsigned AlreadyAdjusted = 0;
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if (MF.getFunction().isVarArg()) {
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// Add in the varargs area here first.
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LLVM_DEBUG(dbgs() << "Varargs\n");
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unsigned VarArgsBytes = MFI.getObjectSize(AFI->getVarArgsFrameIndex());
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unsigned Opc = ARC::SUB_rrlimm;
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if (isUInt<6>(VarArgsBytes))
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Opc = ARC::SUB_rru6;
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else if (isInt<12>(VarArgsBytes))
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Opc = ARC::SUB_rrs12;
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BuildMI(MBB, MBBI, dl, TII->get(Opc), ARC::SP)
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.addReg(ARC::SP)
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.addImm(VarArgsBytes);
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}
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if (hasFP(MF)) {
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LLVM_DEBUG(dbgs() << "Saving FP\n");
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BuildMI(MBB, MBBI, dl, TII->get(ARC::ST_AW_rs9))
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.addReg(ARC::SP, RegState::Define)
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.addReg(ARC::FP)
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.addReg(ARC::SP)
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.addImm(-4);
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AlreadyAdjusted += 4;
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}
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if (UseSaveRestoreFunclet && Last > ARC::R14) {
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LLVM_DEBUG(dbgs() << "Creating store funclet.\n");
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// BL to __save_r13_to_<TRI->getRegAsmName()>
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StackSlotsUsedByFunclet = Last - ARC::R12;
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BuildMI(MBB, MBBI, dl, TII->get(ARC::PUSH_S_BLINK));
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BuildMI(MBB, MBBI, dl, TII->get(ARC::SUB_rru6))
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.addReg(ARC::SP)
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.addReg(ARC::SP)
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.addImm(4 * StackSlotsUsedByFunclet);
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BuildMI(MBB, MBBI, dl, TII->get(ARC::BL))
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.addExternalSymbol(store_funclet_name[Last - ARC::R15])
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.addReg(ARC::BLINK, RegState::Implicit | RegState::Kill);
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AlreadyAdjusted += 4 * (StackSlotsUsedByFunclet + 1);
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SavedBlink = true;
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}
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// If we haven't saved BLINK, but we need to...do that now.
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if (MFI.hasCalls() && !SavedBlink) {
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LLVM_DEBUG(dbgs() << "Creating save blink.\n");
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BuildMI(MBB, MBBI, dl, TII->get(ARC::PUSH_S_BLINK));
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AlreadyAdjusted += 4;
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}
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if (AFI->MaxCallStackReq > 0)
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MFI.setStackSize(MFI.getStackSize() + AFI->MaxCallStackReq);
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// We have already saved some of the stack...
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LLVM_DEBUG(dbgs() << "Adjusting stack by: "
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<< (MFI.getStackSize() - AlreadyAdjusted) << "\n");
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generateStackAdjustment(MBB, MBBI, *ST.getInstrInfo(), dl,
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-(MFI.getStackSize() - AlreadyAdjusted), ARC::SP);
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if (hasFP(MF)) {
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LLVM_DEBUG(dbgs() << "Setting FP from SP.\n");
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BuildMI(MBB, MBBI, dl,
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TII->get(isUInt<6>(MFI.getStackSize()) ? ARC::ADD_rru6
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: ARC::ADD_rrlimm),
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ARC::FP)
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.addReg(ARC::SP)
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.addImm(MFI.getStackSize());
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}
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// Emit CFI records:
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// .cfi_def_cfa_offset StackSize
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// .cfi_offset fp, -StackSize
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// .cfi_offset blink, -StackSize+4
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unsigned CFIIndex = MF.addFrameInst(
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MCCFIInstruction::cfiDefCfaOffset(nullptr, MFI.getStackSize()));
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BuildMI(MBB, MBBI, dl, TII->get(TargetOpcode::CFI_INSTRUCTION))
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.addCFIIndex(CFIIndex)
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.setMIFlags(MachineInstr::FrameSetup);
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int CurOffset = -4;
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if (hasFP(MF)) {
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CFIIndex = MF.addFrameInst(MCCFIInstruction::createOffset(
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nullptr, MRI->getDwarfRegNum(ARC::FP, true), CurOffset));
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BuildMI(MBB, MBBI, dl, TII->get(TargetOpcode::CFI_INSTRUCTION))
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.addCFIIndex(CFIIndex)
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.setMIFlags(MachineInstr::FrameSetup);
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CurOffset -= 4;
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}
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if (MFI.hasCalls()) {
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CFIIndex = MF.addFrameInst(MCCFIInstruction::createOffset(
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nullptr, MRI->getDwarfRegNum(ARC::BLINK, true), CurOffset));
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BuildMI(MBB, MBBI, dl, TII->get(TargetOpcode::CFI_INSTRUCTION))
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.addCFIIndex(CFIIndex)
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.setMIFlags(MachineInstr::FrameSetup);
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}
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// CFI for the rest of the registers.
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for (const auto &Entry : CSI) {
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unsigned Reg = Entry.getReg();
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int FI = Entry.getFrameIdx();
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// Skip BLINK and FP.
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if ((hasFP(MF) && Reg == ARC::FP) || (MFI.hasCalls() && Reg == ARC::BLINK))
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continue;
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CFIIndex = MF.addFrameInst(MCCFIInstruction::createOffset(
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nullptr, MRI->getDwarfRegNum(Reg, true), MFI.getObjectOffset(FI)));
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BuildMI(MBB, MBBI, dl, TII->get(TargetOpcode::CFI_INSTRUCTION))
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.addCFIIndex(CFIIndex)
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.setMIFlags(MachineInstr::FrameSetup);
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}
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}
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/// Insert epilog code into the function.
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/// For ARC, this inserts a call to a function that restores callee saved
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/// registers onto the stack, when enough callee saved registers are required.
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void ARCFrameLowering::emitEpilogue(MachineFunction &MF,
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MachineBasicBlock &MBB) const {
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LLVM_DEBUG(dbgs() << "Emit Epilogue: " << MF.getName() << "\n");
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auto *AFI = MF.getInfo<ARCFunctionInfo>();
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const ARCInstrInfo *TII = MF.getSubtarget<ARCSubtarget>().getInstrInfo();
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MachineBasicBlock::iterator MBBI = MBB.getFirstTerminator();
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MachineFrameInfo &MFI = MF.getFrameInfo();
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uint64_t StackSize = MF.getFrameInfo().getStackSize();
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bool SavedBlink = false;
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unsigned AmountAboveFunclet = 0;
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// If we have variable sized frame objects, then we have to move
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// the stack pointer to a known spot (fp - StackSize).
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// Then, replace the frame pointer by (new) [sp,StackSize-4].
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// Then, move the stack pointer the rest of the way (sp = sp + StackSize).
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if (hasFP(MF)) {
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unsigned Opc = ARC::SUB_rrlimm;
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if (isUInt<6>(StackSize))
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Opc = ARC::SUB_rru6;
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BuildMI(MBB, MBBI, DebugLoc(), TII->get(Opc), ARC::SP)
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.addReg(ARC::FP)
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.addImm(StackSize);
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AmountAboveFunclet += 4;
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}
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// Now, move the stack pointer to the bottom of the save area for the funclet.
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const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
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unsigned Last = determineLastCalleeSave(CSI);
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unsigned StackSlotsUsedByFunclet = 0;
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// Now, restore the callee save registers.
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if (UseSaveRestoreFunclet && Last > ARC::R14) {
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// BL to __ld_r13_to_<TRI->getRegAsmName()>
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StackSlotsUsedByFunclet = Last - ARC::R12;
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AmountAboveFunclet += 4 * (StackSlotsUsedByFunclet + 1);
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SavedBlink = true;
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}
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if (MFI.hasCalls() && !SavedBlink) {
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AmountAboveFunclet += 4;
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SavedBlink = true;
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}
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// Move the stack pointer up to the point of the funclet.
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if (unsigned MoveAmount = StackSize - AmountAboveFunclet) {
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unsigned Opc = ARC::ADD_rrlimm;
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if (isUInt<6>(MoveAmount))
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Opc = ARC::ADD_rru6;
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else if (isInt<12>(MoveAmount))
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Opc = ARC::ADD_rrs12;
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BuildMI(MBB, MBBI, MBB.findDebugLoc(MBBI), TII->get(Opc), ARC::SP)
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.addReg(ARC::SP)
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.addImm(StackSize - AmountAboveFunclet);
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}
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if (StackSlotsUsedByFunclet) {
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// This part of the adjustment will always be < 64 bytes.
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BuildMI(MBB, MBBI, MBB.findDebugLoc(MBBI), TII->get(ARC::BL))
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.addExternalSymbol(load_funclet_name[Last - ARC::R15])
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.addReg(ARC::BLINK, RegState::Implicit | RegState::Kill);
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unsigned Opc = ARC::ADD_rrlimm;
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if (isUInt<6>(4 * StackSlotsUsedByFunclet))
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Opc = ARC::ADD_rru6;
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else if (isInt<12>(4 * StackSlotsUsedByFunclet))
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Opc = ARC::ADD_rrs12;
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BuildMI(MBB, MBBI, MBB.findDebugLoc(MBBI), TII->get(Opc), ARC::SP)
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.addReg(ARC::SP)
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.addImm(4 * (StackSlotsUsedByFunclet));
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}
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// Now, pop blink if necessary.
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if (SavedBlink) {
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BuildMI(MBB, MBBI, MBB.findDebugLoc(MBBI), TII->get(ARC::POP_S_BLINK));
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}
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// Now, pop fp if necessary.
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if (hasFP(MF)) {
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BuildMI(MBB, MBBI, MBB.findDebugLoc(MBBI), TII->get(ARC::LD_AB_rs9))
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.addReg(ARC::FP, RegState::Define)
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.addReg(ARC::SP, RegState::Define)
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.addReg(ARC::SP)
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.addImm(4);
|
||
|
|
}
|
||
|
|
|
||
|
|
// Relieve the varargs area if necessary.
|
||
|
|
if (MF.getFunction().isVarArg()) {
|
||
|
|
// Add in the varargs area here first.
|
||
|
|
LLVM_DEBUG(dbgs() << "Varargs\n");
|
||
|
|
unsigned VarArgsBytes = MFI.getObjectSize(AFI->getVarArgsFrameIndex());
|
||
|
|
unsigned Opc = ARC::ADD_rrlimm;
|
||
|
|
if (isUInt<6>(VarArgsBytes))
|
||
|
|
Opc = ARC::ADD_rru6;
|
||
|
|
else if (isInt<12>(VarArgsBytes))
|
||
|
|
Opc = ARC::ADD_rrs12;
|
||
|
|
BuildMI(MBB, MBBI, MBB.findDebugLoc(MBBI), TII->get(Opc))
|
||
|
|
.addReg(ARC::SP)
|
||
|
|
.addReg(ARC::SP)
|
||
|
|
.addImm(VarArgsBytes);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
static std::vector<CalleeSavedInfo>::iterator
|
||
|
|
getSavedReg(std::vector<CalleeSavedInfo> &V, unsigned reg) {
|
||
|
|
for (auto I = V.begin(), E = V.end(); I != E; ++I) {
|
||
|
|
if (reg == I->getReg())
|
||
|
|
return I;
|
||
|
|
}
|
||
|
|
return V.end();
|
||
|
|
}
|
||
|
|
|
||
|
|
bool ARCFrameLowering::assignCalleeSavedSpillSlots(
|
||
|
|
MachineFunction &MF, const TargetRegisterInfo *TRI,
|
||
|
|
std::vector<CalleeSavedInfo> &CSI) const {
|
||
|
|
// Use this opportunity to assign the spill slots for all of the potential
|
||
|
|
// callee save registers (blink, fp, r13->r25) that we care about the
|
||
|
|
// placement for. We can calculate all of that data here.
|
||
|
|
int CurOffset = -4;
|
||
|
|
unsigned Last = determineLastCalleeSave(CSI);
|
||
|
|
MachineFrameInfo &MFI = MF.getFrameInfo();
|
||
|
|
if (hasFP(MF)) {
|
||
|
|
// Create a fixed slot at for FP
|
||
|
|
int StackObj = MFI.CreateFixedSpillStackObject(4, CurOffset, true);
|
||
|
|
LLVM_DEBUG(dbgs() << "Creating fixed object (" << StackObj << ") for FP at "
|
||
|
|
<< CurOffset << "\n");
|
||
|
|
(void)StackObj;
|
||
|
|
CurOffset -= 4;
|
||
|
|
}
|
||
|
|
if (MFI.hasCalls() || (UseSaveRestoreFunclet && Last > ARC::R14)) {
|
||
|
|
// Create a fixed slot for BLINK.
|
||
|
|
int StackObj = MFI.CreateFixedSpillStackObject(4, CurOffset, true);
|
||
|
|
LLVM_DEBUG(dbgs() << "Creating fixed object (" << StackObj
|
||
|
|
<< ") for BLINK at " << CurOffset << "\n");
|
||
|
|
(void)StackObj;
|
||
|
|
CurOffset -= 4;
|
||
|
|
}
|
||
|
|
|
||
|
|
// Create slots for last down to r13.
|
||
|
|
for (unsigned Which = Last; Which > ARC::R12; Which--) {
|
||
|
|
auto RegI = getSavedReg(CSI, Which);
|
||
|
|
if (RegI == CSI.end() || RegI->getFrameIdx() == 0) {
|
||
|
|
// Always create the stack slot. If for some reason the register isn't in
|
||
|
|
// the save list, then don't worry about it.
|
||
|
|
int FI = MFI.CreateFixedSpillStackObject(4, CurOffset, true);
|
||
|
|
if (RegI != CSI.end())
|
||
|
|
RegI->setFrameIdx(FI);
|
||
|
|
} else
|
||
|
|
MFI.setObjectOffset(RegI->getFrameIdx(), CurOffset);
|
||
|
|
CurOffset -= 4;
|
||
|
|
}
|
||
|
|
for (auto &I : CSI) {
|
||
|
|
if (I.getReg() > ARC::R12)
|
||
|
|
continue;
|
||
|
|
if (I.getFrameIdx() == 0) {
|
||
|
|
I.setFrameIdx(MFI.CreateFixedSpillStackObject(4, CurOffset, true));
|
||
|
|
LLVM_DEBUG(dbgs() << "Creating fixed object (" << I.getFrameIdx()
|
||
|
|
<< ") for other register at " << CurOffset << "\n");
|
||
|
|
} else {
|
||
|
|
MFI.setObjectOffset(I.getFrameIdx(), CurOffset);
|
||
|
|
LLVM_DEBUG(dbgs() << "Updating fixed object (" << I.getFrameIdx()
|
||
|
|
<< ") for other register at " << CurOffset << "\n");
|
||
|
|
}
|
||
|
|
CurOffset -= 4;
|
||
|
|
}
|
||
|
|
return true;
|
||
|
|
}
|
||
|
|
|
||
|
|
bool ARCFrameLowering::spillCalleeSavedRegisters(
|
||
|
|
MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
|
||
|
|
ArrayRef<CalleeSavedInfo> CSI, const TargetRegisterInfo *TRI) const {
|
||
|
|
LLVM_DEBUG(dbgs() << "Spill callee saved registers: "
|
||
|
|
<< MBB.getParent()->getName() << "\n");
|
||
|
|
// There are routines for saving at least 3 registers (r13 to r15, etc.)
|
||
|
|
unsigned Last = determineLastCalleeSave(CSI);
|
||
|
|
if (UseSaveRestoreFunclet && Last > ARC::R14) {
|
||
|
|
// Use setObjectOffset for these registers.
|
||
|
|
// Needs to be in or before processFunctionBeforeFrameFinalized.
|
||
|
|
// Or, do assignCalleeSaveSpillSlots?
|
||
|
|
// Will be handled in prolog.
|
||
|
|
return true;
|
||
|
|
}
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
|
||
|
|
bool ARCFrameLowering::restoreCalleeSavedRegisters(
|
||
|
|
MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
|
||
|
|
MutableArrayRef<CalleeSavedInfo> CSI, const TargetRegisterInfo *TRI) const {
|
||
|
|
LLVM_DEBUG(dbgs() << "Restore callee saved registers: "
|
||
|
|
<< MBB.getParent()->getName() << "\n");
|
||
|
|
// There are routines for saving at least 3 registers (r13 to r15, etc.)
|
||
|
|
unsigned Last = determineLastCalleeSave(CSI);
|
||
|
|
if (UseSaveRestoreFunclet && Last > ARC::R14) {
|
||
|
|
// Will be handled in epilog.
|
||
|
|
return true;
|
||
|
|
}
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
|
||
|
|
// Adjust local variables that are 4-bytes or larger to 4-byte boundary
|
||
|
|
void ARCFrameLowering::processFunctionBeforeFrameFinalized(
|
||
|
|
MachineFunction &MF, RegScavenger *RS) const {
|
||
|
|
const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo();
|
||
|
|
LLVM_DEBUG(dbgs() << "Process function before frame finalized: "
|
||
|
|
<< MF.getName() << "\n");
|
||
|
|
MachineFrameInfo &MFI = MF.getFrameInfo();
|
||
|
|
LLVM_DEBUG(dbgs() << "Current stack size: " << MFI.getStackSize() << "\n");
|
||
|
|
const TargetRegisterClass *RC = &ARC::GPR32RegClass;
|
||
|
|
if (MFI.hasStackObjects()) {
|
||
|
|
int RegScavFI = MFI.CreateStackObject(RegInfo->getSpillSize(*RC),
|
||
|
|
RegInfo->getSpillAlign(*RC), false);
|
||
|
|
RS->addScavengingFrameIndex(RegScavFI);
|
||
|
|
LLVM_DEBUG(dbgs() << "Created scavenging index RegScavFI=" << RegScavFI
|
||
|
|
<< "\n");
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
static void emitRegUpdate(MachineBasicBlock &MBB,
|
||
|
|
MachineBasicBlock::iterator &MBBI, DebugLoc dl,
|
||
|
|
unsigned Reg, int NumBytes, bool IsAdd,
|
||
|
|
const ARCInstrInfo *TII) {
|
||
|
|
unsigned Opc;
|
||
|
|
if (isUInt<6>(NumBytes))
|
||
|
|
Opc = IsAdd ? ARC::ADD_rru6 : ARC::SUB_rru6;
|
||
|
|
else if (isInt<12>(NumBytes))
|
||
|
|
Opc = IsAdd ? ARC::ADD_rrs12 : ARC::SUB_rrs12;
|
||
|
|
else
|
||
|
|
Opc = IsAdd ? ARC::ADD_rrlimm : ARC::SUB_rrlimm;
|
||
|
|
|
||
|
|
BuildMI(MBB, MBBI, dl, TII->get(Opc), Reg)
|
||
|
|
.addReg(Reg, RegState::Kill)
|
||
|
|
.addImm(NumBytes);
|
||
|
|
}
|
||
|
|
|
||
|
|
MachineBasicBlock::iterator ARCFrameLowering::eliminateCallFramePseudoInstr(
|
||
|
|
MachineFunction &MF, MachineBasicBlock &MBB,
|
||
|
|
MachineBasicBlock::iterator I) const {
|
||
|
|
LLVM_DEBUG(dbgs() << "EmitCallFramePseudo: " << MF.getName() << "\n");
|
||
|
|
const ARCInstrInfo *TII = MF.getSubtarget<ARCSubtarget>().getInstrInfo();
|
||
|
|
MachineInstr &Old = *I;
|
||
|
|
DebugLoc dl = Old.getDebugLoc();
|
||
|
|
unsigned Amt = Old.getOperand(0).getImm();
|
||
|
|
auto *AFI = MF.getInfo<ARCFunctionInfo>();
|
||
|
|
if (!hasFP(MF)) {
|
||
|
|
if (Amt > AFI->MaxCallStackReq && Old.getOpcode() == ARC::ADJCALLSTACKDOWN)
|
||
|
|
AFI->MaxCallStackReq = Amt;
|
||
|
|
} else {
|
||
|
|
if (Amt != 0) {
|
||
|
|
assert((Old.getOpcode() == ARC::ADJCALLSTACKDOWN ||
|
||
|
|
Old.getOpcode() == ARC::ADJCALLSTACKUP) &&
|
||
|
|
"Unknown Frame Pseudo.");
|
||
|
|
bool IsAdd = (Old.getOpcode() == ARC::ADJCALLSTACKUP);
|
||
|
|
emitRegUpdate(MBB, I, dl, ARC::SP, Amt, IsAdd, TII);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
return MBB.erase(I);
|
||
|
|
}
|
||
|
|
|
||
|
|
bool ARCFrameLowering::hasFP(const MachineFunction &MF) const {
|
||
|
|
const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo();
|
||
|
|
bool HasFP = MF.getTarget().Options.DisableFramePointerElim(MF) ||
|
||
|
|
MF.getFrameInfo().hasVarSizedObjects() ||
|
||
|
|
MF.getFrameInfo().isFrameAddressTaken() ||
|
||
|
|
RegInfo->needsStackRealignment(MF);
|
||
|
|
return HasFP;
|
||
|
|
}
|