78 lines
2.2 KiB
C
78 lines
2.2 KiB
C
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//===--- SIProgramInfo.h ----------------------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file
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/// Defines struct to track resource usage and hardware flags for kernels and
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/// entry functions.
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///
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_AMDGPU_SIPROGRAMINFO_H
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#define LLVM_LIB_TARGET_AMDGPU_SIPROGRAMINFO_H
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#include "llvm/IR/CallingConv.h"
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#include <cstdint>
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namespace llvm {
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/// Track resource usage for kernels / entry functions.
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struct SIProgramInfo {
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// Fields set in PGM_RSRC1 pm4 packet.
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uint32_t VGPRBlocks = 0;
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uint32_t SGPRBlocks = 0;
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uint32_t Priority = 0;
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uint32_t FloatMode = 0;
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uint32_t Priv = 0;
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uint32_t DX10Clamp = 0;
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uint32_t DebugMode = 0;
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uint32_t IEEEMode = 0;
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uint32_t WgpMode = 0; // GFX10+
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uint32_t MemOrdered = 0; // GFX10+
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uint64_t ScratchSize = 0;
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// Fields set in PGM_RSRC2 pm4 packet.
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uint32_t LDSBlocks = 0;
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uint32_t ScratchBlocks = 0;
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uint64_t ComputePGMRSrc2 = 0;
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uint32_t NumVGPR = 0;
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uint32_t NumArchVGPR = 0;
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uint32_t NumAccVGPR = 0;
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uint32_t NumSGPR = 0;
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uint32_t LDSSize = 0;
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bool FlatUsed = false;
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// Number of SGPRs that meets number of waves per execution unit request.
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uint32_t NumSGPRsForWavesPerEU = 0;
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// Number of VGPRs that meets number of waves per execution unit request.
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uint32_t NumVGPRsForWavesPerEU = 0;
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// Final occupancy.
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uint32_t Occupancy = 0;
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// Whether there is recursion, dynamic allocas, indirect calls or some other
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// reason there may be statically unknown stack usage.
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bool DynamicCallStack = false;
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// Bonus information for debugging.
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bool VCCUsed = false;
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SIProgramInfo() = default;
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/// Compute the value of the ComputePGMRsrc1 register.
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uint64_t getComputePGMRSrc1() const;
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uint64_t getPGMRSrc1(CallingConv::ID CC) const;
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};
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} // namespace llvm
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#endif // LLVM_LIB_TARGET_AMDGPU_SIPROGRAMINFO_H
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