add gcc-11.1.0 hash and patches
This commit is contained in:
Szabolcs Nagy
Rich Felker
parent
d06727c1c4
commit
64649ce72d
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@ -0,0 +1 @@
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9db7917f4ce337026335430814de0a5e991ec6c1 gcc-11.1.0.tar.xz
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@ -0,0 +1,14 @@
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diff --git a/gcc/gcc.c b/gcc/gcc.c
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index 7837553958b..3c81c5798d8 100644
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--- a/gcc/gcc.c
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+++ b/gcc/gcc.c
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@@ -980,7 +980,8 @@ proper position among the other output files. */
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#ifndef LINK_SSP_SPEC
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#ifdef TARGET_LIBC_PROVIDES_SSP
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#define LINK_SSP_SPEC "%{fstack-protector|fstack-protector-all" \
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- "|fstack-protector-strong|fstack-protector-explicit:}"
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+ "|fstack-protector-strong|fstack-protector-explicit" \
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+ ":-lssp_nonshared}"
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#else
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#define LINK_SSP_SPEC "%{fstack-protector|fstack-protector-all" \
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"|fstack-protector-strong|fstack-protector-explicit" \
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@ -0,0 +1,30 @@
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diff --git a/gcc/config/i386/pmm_malloc.h b/gcc/config/i386/pmm_malloc.h
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index 1b0bfe37852..d7b2b19bb3c 100644
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--- a/gcc/config/i386/pmm_malloc.h
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+++ b/gcc/config/i386/pmm_malloc.h
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@@ -27,12 +27,13 @@
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#include <stdlib.h>
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/* We can't depend on <stdlib.h> since the prototype of posix_memalign
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- may not be visible. */
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+ may not be visible and we can't pollute the namespace either. */
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#ifndef __cplusplus
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-extern int posix_memalign (void **, size_t, size_t);
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+extern int _mm_posix_memalign (void **, size_t, size_t)
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#else
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-extern "C" int posix_memalign (void **, size_t, size_t) throw ();
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+extern "C" int _mm_posix_memalign (void **, size_t, size_t) throw ()
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#endif
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+__asm__("posix_memalign");
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static __inline void *
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_mm_malloc (size_t __size, size_t __alignment)
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@@ -42,7 +43,7 @@ _mm_malloc (size_t __size, size_t __alignment)
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return malloc (__size);
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if (__alignment == 2 || (sizeof (void *) == 8 && __alignment == 4))
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__alignment = sizeof (void *);
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- if (posix_memalign (&__ptr, __alignment, __size) == 0)
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+ if (_mm_posix_memalign (&__ptr, __alignment, __size) == 0)
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return __ptr;
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else
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return NULL;
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@ -0,0 +1,346 @@
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diff --git a/gcc/config.gcc b/gcc/config.gcc
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index 357b0bed067..528add999f2 100644
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--- a/gcc/config.gcc
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+++ b/gcc/config.gcc
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@@ -556,7 +556,7 @@ s390*-*-*)
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extra_headers="s390intrin.h htmintrin.h htmxlintrin.h vecintrin.h"
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;;
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# Note the 'l'; we need to be able to match e.g. "shle" or "shl".
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-sh[123456789lbe]*-*-* | sh-*-*)
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+sh[123456789lbej]*-*-* | sh-*-*)
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cpu_type=sh
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extra_options="${extra_options} fused-madd.opt"
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extra_objs="${extra_objs} sh_treg_combine.o sh-mem.o sh_optimize_sett_clrt.o"
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@@ -3202,18 +3202,18 @@ s390x-ibm-tpf*)
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extra_options="${extra_options} s390/tpf.opt"
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tmake_file="${tmake_file} s390/t-s390"
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;;
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-sh-*-elf* | sh[12346l]*-*-elf* | \
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- sh-*-linux* | sh[2346lbe]*-*-linux* | \
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+sh-*-elf* | sh[12346lj]*-*-elf* | \
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+ sh-*-linux* | sh[2346lbej]*-*-linux* | \
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sh-*-netbsdelf* | shl*-*-netbsdelf*)
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tmake_file="${tmake_file} sh/t-sh sh/t-elf"
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if test x${with_endian} = x; then
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case ${target} in
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- sh[1234]*be-*-* | sh[1234]*eb-*-*) with_endian=big ;;
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+ sh[j1234]*be-*-* | sh[j1234]*eb-*-*) with_endian=big ;;
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shbe-*-* | sheb-*-*) with_endian=big,little ;;
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sh[1234]l* | sh[34]*-*-linux*) with_endian=little ;;
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shl* | sh*-*-linux* | \
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sh-superh-elf) with_endian=little,big ;;
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- sh[1234]*-*-*) with_endian=big ;;
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+ sh[j1234]*-*-*) with_endian=big ;;
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*) with_endian=big,little ;;
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esac
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fi
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@@ -3280,6 +3280,7 @@ sh-*-elf* | sh[12346l]*-*-elf* | \
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sh2a_nofpu*) sh_cpu_target=sh2a-nofpu ;;
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sh2a*) sh_cpu_target=sh2a ;;
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sh2e*) sh_cpu_target=sh2e ;;
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+ shj2*) sh_cpu_target=shj2;;
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sh2*) sh_cpu_target=sh2 ;;
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*) sh_cpu_target=sh1 ;;
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esac
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@@ -3301,7 +3302,7 @@ sh-*-elf* | sh[12346l]*-*-elf* | \
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sh2a-single-only | sh2a-single | sh2a-nofpu | sh2a | \
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sh4a-single-only | sh4a-single | sh4a-nofpu | sh4a | sh4al | \
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sh4-single-only | sh4-single | sh4-nofpu | sh4 | sh4-300 | \
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- sh3e | sh3 | sh2e | sh2 | sh1) ;;
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+ sh3e | sh3 | sh2e | sh2 | sh1 | shj2) ;;
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"") sh_cpu_default=${sh_cpu_target} ;;
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*) echo "with_cpu=$with_cpu not supported"; exit 1 ;;
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esac
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@@ -3310,9 +3311,9 @@ sh-*-elf* | sh[12346l]*-*-elf* | \
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case ${target} in
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sh[1234]*) sh_multilibs=${sh_cpu_target} ;;
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sh-superh-*) sh_multilibs=m4,m4-single,m4-single-only,m4-nofpu ;;
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- sh*-*-linux*) sh_multilibs=m1,m2,m2a,m3e,m4 ;;
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+ sh*-*-linux*) sh_multilibs=m1,m2,m2a,m3e,m4,mj2 ;;
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sh*-*-netbsd*) sh_multilibs=m3,m3e,m4 ;;
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- *) sh_multilibs=m1,m2,m2e,m4,m4-single,m4-single-only,m2a,m2a-single ;;
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+ *) sh_multilibs=m1,m2,m2e,m4,m4-single,m4-single-only,m2a,m2a-single,mj2 ;;
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esac
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if test x$with_fp = xno; then
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sh_multilibs="`echo $sh_multilibs|sed -e s/m4/sh4-nofpu/ -e s/,m4-[^,]*//g -e s/,m[23]e// -e s/m2a,m2a-single/m2a-nofpu/ -e s/m5-..m....,//g`"
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@@ -3327,7 +3328,8 @@ sh-*-elf* | sh[12346l]*-*-elf* | \
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m1 | m2 | m2e | m3 | m3e | \
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m4 | m4-single | m4-single-only | m4-nofpu | m4-300 |\
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m4a | m4a-single | m4a-single-only | m4a-nofpu | m4al | \
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- m2a | m2a-single | m2a-single-only | m2a-nofpu)
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+ m2a | m2a-single | m2a-single-only | m2a-nofpu | \
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+ mj2)
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# TM_MULTILIB_CONFIG is used by t-sh for the non-endian multilib definition
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# It is passed to MULTIILIB_OPTIONS verbatim.
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TM_MULTILIB_CONFIG="${TM_MULTILIB_CONFIG}/${sh_multilib}"
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@@ -3344,7 +3346,7 @@ sh-*-elf* | sh[12346l]*-*-elf* | \
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done
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TM_MULTILIB_CONFIG=`echo $TM_MULTILIB_CONFIG | sed 's:^/::'`
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if test x${enable_incomplete_targets} = xyes ; then
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- tm_defines="$tm_defines SUPPORT_SH1=1 SUPPORT_SH2E=1 SUPPORT_SH4=1 SUPPORT_SH4_SINGLE=1 SUPPORT_SH2A=1 SUPPORT_SH2A_SINGLE=1"
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+ tm_defines="$tm_defines SUPPORT_SH1=1 SUPPORT_SH2E=1 SUPPORT_SH4=1 SUPPORT_SH4_SINGLE=1 SUPPORT_SH2A=1 SUPPORT_SH2A_SINGLE=1 SUPPORT_SHJ2=1"
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fi
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tm_file="$tm_file ./sysroot-suffix.h"
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tmake_file="$tmake_file t-sysroot-suffix"
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@@ -5175,6 +5177,8 @@ case "${target}" in
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;;
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m4a | m4a-single | m4a-single-only | m4a-nofpu | m4al)
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;;
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+ mj2)
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+ ;;
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*)
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echo "Unknown CPU used in --with-cpu=$with_cpu, known values:" 1>&2
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echo "m1 m2 m2e m3 m3e m4 m4-single m4-single-only m4-nofpu" 1>&2
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@@ -5385,7 +5389,7 @@ case ${target} in
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tmake_file="${cpu_type}/t-${cpu_type} ${tmake_file}"
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;;
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- sh[123456ble]*-*-* | sh-*-*)
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+ sh[123456blej]*-*-* | sh-*-*)
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c_target_objs="${c_target_objs} sh-c.o"
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cxx_target_objs="${cxx_target_objs} sh-c.o"
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;;
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diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c
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index 1564109c942..798c1c1c1a3 100644
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--- a/gcc/config/sh/sh.c
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+++ b/gcc/config/sh/sh.c
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@@ -686,6 +686,7 @@ parse_validate_atomic_model_option (const char* str)
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model_names[sh_atomic_model::hard_llcs] = "hard-llcs";
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model_names[sh_atomic_model::soft_tcb] = "soft-tcb";
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model_names[sh_atomic_model::soft_imask] = "soft-imask";
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+ model_names[sh_atomic_model::hard_cas] = "hard-cas";
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const char* model_cdef_names[sh_atomic_model::num_models];
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model_cdef_names[sh_atomic_model::none] = "NONE";
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@@ -693,6 +694,7 @@ parse_validate_atomic_model_option (const char* str)
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model_cdef_names[sh_atomic_model::hard_llcs] = "HARD_LLCS";
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model_cdef_names[sh_atomic_model::soft_tcb] = "SOFT_TCB";
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model_cdef_names[sh_atomic_model::soft_imask] = "SOFT_IMASK";
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+ model_cdef_names[sh_atomic_model::hard_cas] = "HARD_CAS";
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sh_atomic_model ret;
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ret.type = sh_atomic_model::none;
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@@ -771,6 +773,9 @@ got_mode_name:;
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if (ret.type == sh_atomic_model::soft_imask && TARGET_USERMODE)
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err_ret ("cannot use atomic model %s in user mode", ret.name);
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+ if (ret.type == sh_atomic_model::hard_cas && !TARGET_SHJ2)
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+ err_ret ("atomic model %s is only available J2 targets", ret.name);
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+
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return ret;
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#undef err_ret
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@@ -827,6 +832,8 @@ sh_option_override (void)
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sh_cpu = PROCESSOR_SH2E;
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if (TARGET_SH2A)
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sh_cpu = PROCESSOR_SH2A;
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+ if (TARGET_SHJ2)
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+ sh_cpu = PROCESSOR_SHJ2;
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if (TARGET_SH3)
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sh_cpu = PROCESSOR_SH3;
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if (TARGET_SH3E)
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diff --git a/gcc/config/sh/sh.h b/gcc/config/sh/sh.h
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index d2280e2ffe6..3a54a896721 100644
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--- a/gcc/config/sh/sh.h
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+++ b/gcc/config/sh/sh.h
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@@ -85,6 +85,7 @@ extern int code_for_indirect_jump_scratch;
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#define SUPPORT_SH4_SINGLE 1
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#define SUPPORT_SH2A 1
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#define SUPPORT_SH2A_SINGLE 1
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+#define SUPPORT_SHJ2 1
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#endif
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#define TARGET_DIVIDE_CALL_DIV1 (sh_div_strategy == SH_DIV_CALL_DIV1)
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@@ -117,6 +118,7 @@ extern int code_for_indirect_jump_scratch;
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#define SELECT_SH4A_SINGLE_ONLY (MASK_SH4A | SELECT_SH4_SINGLE_ONLY)
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#define SELECT_SH4A (MASK_SH4A | SELECT_SH4)
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#define SELECT_SH4A_SINGLE (MASK_SH4A | SELECT_SH4_SINGLE)
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+#define SELECT_SHJ2 (MASK_SHJ2 | SELECT_SH2)
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#if SUPPORT_SH1
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#define SUPPORT_SH2 1
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@@ -124,6 +126,7 @@ extern int code_for_indirect_jump_scratch;
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|
#if SUPPORT_SH2
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#define SUPPORT_SH3 1
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#define SUPPORT_SH2A_NOFPU 1
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|
+#define SUPPORT_SHJ2 1
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|
#endif
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|
#if SUPPORT_SH3
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|
#define SUPPORT_SH4_NOFPU 1
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|
@@ -156,7 +159,7 @@ extern int code_for_indirect_jump_scratch;
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|
#define MASK_ARCH (MASK_SH1 | MASK_SH2 | MASK_SH3 | MASK_SH_E | MASK_SH4 \
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|
| MASK_HARD_SH2A | MASK_HARD_SH2A_DOUBLE | MASK_SH4A \
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| MASK_HARD_SH4 | MASK_FPU_SINGLE \
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|
- | MASK_FPU_SINGLE_ONLY)
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|
+ | MASK_FPU_SINGLE_ONLY | MASK_SHJ2)
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|
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|
/* This defaults us to big-endian. */
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|
#ifndef TARGET_ENDIAN_DEFAULT
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|
@@ -231,7 +234,8 @@ extern int code_for_indirect_jump_scratch;
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|
%{m2a-single:--isa=sh2a} \
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|
%{m2a-single-only:--isa=sh2a} \
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|
%{m2a-nofpu:--isa=sh2a-nofpu} \
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|
-%{m4al:-dsp}"
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|
+%{m4al:-dsp} \
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|
+%{mj2:-isa=j2}"
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|
|
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|
#define ASM_SPEC SH_ASM_SPEC
|
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|
|
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|
@@ -347,6 +351,7 @@ struct sh_atomic_model
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|
hard_llcs,
|
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|
soft_tcb,
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|
soft_imask,
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|
+ hard_cas,
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|
|
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|
num_models
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|
};
|
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|
@@ -390,6 +395,9 @@ extern const sh_atomic_model& selected_atomic_model (void);
|
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|
#define TARGET_ATOMIC_SOFT_IMASK \
|
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|
(selected_atomic_model ().type == sh_atomic_model::soft_imask)
|
||||||
|
|
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|
+#define TARGET_ATOMIC_HARD_CAS \
|
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|
+ (selected_atomic_model ().type == sh_atomic_model::hard_cas)
|
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|
+
|
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|
#endif // __cplusplus
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|
|
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|
#define SUBTARGET_OVERRIDE_OPTIONS (void) 0
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|
@@ -1484,7 +1492,7 @@ extern bool current_function_interrupt;
|
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|
|
||||||
|
/* Nonzero if the target supports dynamic shift instructions
|
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|
like shad and shld. */
|
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|
-#define TARGET_DYNSHIFT (TARGET_SH3 || TARGET_SH2A)
|
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|
+#define TARGET_DYNSHIFT (TARGET_SH3 || TARGET_SH2A || TARGET_SHJ2)
|
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|
|
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|
/* The cost of using the dynamic shift insns (shad, shld) are the same
|
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|
if they are available. If they are not available a library function will
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|
@@ -1747,6 +1755,7 @@ enum processor_type {
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|
PROCESSOR_SH2,
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|
PROCESSOR_SH2E,
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|
PROCESSOR_SH2A,
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|
+ PROCESSOR_SHJ2,
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|
PROCESSOR_SH3,
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|
PROCESSOR_SH3E,
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|
PROCESSOR_SH4,
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|
diff --git a/gcc/config/sh/sh.opt b/gcc/config/sh/sh.opt
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|
index b4755a812f3..0989a1c18da 100644
|
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|
--- a/gcc/config/sh/sh.opt
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|
+++ b/gcc/config/sh/sh.opt
|
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|
@@ -65,6 +65,10 @@ m2e
|
||||||
|
Target RejectNegative Condition(SUPPORT_SH2E)
|
||||||
|
Generate SH2e code.
|
||||||
|
|
||||||
|
+mj2
|
||||||
|
+Target RejectNegative Mask(SHJ2) Condition(SUPPORT_SHJ2)
|
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|
+Generate J2 code.
|
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|
+
|
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|
m3
|
||||||
|
Target RejectNegative Mask(SH3) Condition(SUPPORT_SH3)
|
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|
Generate SH3 code.
|
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|
diff --git a/gcc/config/sh/sync.md b/gcc/config/sh/sync.md
|
||||||
|
index 2b43f8edb86..118fc5d06db 100644
|
||||||
|
--- a/gcc/config/sh/sync.md
|
||||||
|
+++ b/gcc/config/sh/sync.md
|
||||||
|
@@ -240,6 +240,9 @@
|
||||||
|
|| (TARGET_SH4A && <MODE>mode == SImode && !TARGET_ATOMIC_STRICT))
|
||||||
|
atomic_insn = gen_atomic_compare_and_swap<mode>_hard (old_val, mem,
|
||||||
|
exp_val, new_val);
|
||||||
|
+ else if (TARGET_ATOMIC_HARD_CAS && <MODE>mode == SImode)
|
||||||
|
+ atomic_insn = gen_atomic_compare_and_swap<mode>_cas (old_val, mem,
|
||||||
|
+ exp_val, new_val);
|
||||||
|
else if (TARGET_ATOMIC_SOFT_GUSA)
|
||||||
|
atomic_insn = gen_atomic_compare_and_swap<mode>_soft_gusa (old_val, mem,
|
||||||
|
exp_val, new_val);
|
||||||
|
@@ -306,6 +309,57 @@
|
||||||
|
}
|
||||||
|
[(set_attr "length" "14")])
|
||||||
|
|
||||||
|
+(define_expand "atomic_compare_and_swapsi_cas"
|
||||||
|
+ [(set (match_operand:SI 0 "register_operand" "=r")
|
||||||
|
+ (unspec_volatile:SI
|
||||||
|
+ [(match_operand:SI 1 "atomic_mem_operand_0" "=Sra")
|
||||||
|
+ (match_operand:SI 2 "register_operand" "r")
|
||||||
|
+ (match_operand:SI 3 "register_operand" "r")]
|
||||||
|
+ UNSPECV_CMPXCHG_1))]
|
||||||
|
+ "TARGET_ATOMIC_HARD_CAS"
|
||||||
|
+{
|
||||||
|
+ rtx mem = gen_rtx_REG (SImode, 0);
|
||||||
|
+ emit_move_insn (mem, force_reg (SImode, XEXP (operands[1], 0)));
|
||||||
|
+ emit_insn (gen_shj2_cas (operands[0], mem, operands[2], operands[3]));
|
||||||
|
+ DONE;
|
||||||
|
+})
|
||||||
|
+
|
||||||
|
+(define_insn "shj2_cas"
|
||||||
|
+ [(set (match_operand:SI 0 "register_operand" "=&r")
|
||||||
|
+ (unspec_volatile:SI
|
||||||
|
+ [(match_operand:SI 1 "register_operand" "=r")
|
||||||
|
+ (match_operand:SI 2 "register_operand" "r")
|
||||||
|
+ (match_operand:SI 3 "register_operand" "0")]
|
||||||
|
+ UNSPECV_CMPXCHG_1))
|
||||||
|
+ (set (reg:SI T_REG)
|
||||||
|
+ (unspec_volatile:SI [(const_int 0)] UNSPECV_CMPXCHG_3))]
|
||||||
|
+ "TARGET_ATOMIC_HARD_CAS"
|
||||||
|
+ "cas.l %2,%0,@%1"
|
||||||
|
+ [(set_attr "length" "2")]
|
||||||
|
+)
|
||||||
|
+
|
||||||
|
+(define_expand "atomic_compare_and_swapqi_cas"
|
||||||
|
+ [(set (match_operand:SI 0 "arith_reg_dest" "=&r")
|
||||||
|
+ (unspec_volatile:SI
|
||||||
|
+ [(match_operand:SI 1 "atomic_mem_operand_0" "=Sra")
|
||||||
|
+ (match_operand:SI 2 "arith_operand" "rI08")
|
||||||
|
+ (match_operand:SI 3 "arith_operand" "rI08")]
|
||||||
|
+ UNSPECV_CMPXCHG_1))]
|
||||||
|
+ "TARGET_ATOMIC_HARD_CAS"
|
||||||
|
+{FAIL;}
|
||||||
|
+)
|
||||||
|
+
|
||||||
|
+(define_expand "atomic_compare_and_swaphi_cas"
|
||||||
|
+ [(set (match_operand:SI 0 "arith_reg_dest" "=&r")
|
||||||
|
+ (unspec_volatile:SI
|
||||||
|
+ [(match_operand:SI 1 "atomic_mem_operand_0" "=Sra")
|
||||||
|
+ (match_operand:SI 2 "arith_operand" "rI08")
|
||||||
|
+ (match_operand:SI 3 "arith_operand" "rI08")]
|
||||||
|
+ UNSPECV_CMPXCHG_1))]
|
||||||
|
+ "TARGET_ATOMIC_HARD_CAS"
|
||||||
|
+{FAIL;}
|
||||||
|
+)
|
||||||
|
+
|
||||||
|
;; The QIHImode llcs patterns modify the address register of the memory
|
||||||
|
;; operand. In order to express that, we have to open code the memory
|
||||||
|
;; operand. Initially the insn is expanded like every other atomic insn
|
||||||
|
diff --git a/gcc/config/sh/t-sh b/gcc/config/sh/t-sh
|
||||||
|
index 888f8ff7f25..29fd6ae45fd 100644
|
||||||
|
--- a/gcc/config/sh/t-sh
|
||||||
|
+++ b/gcc/config/sh/t-sh
|
||||||
|
@@ -50,7 +50,8 @@ MULTILIB_MATCHES = $(shell \
|
||||||
|
m2e,m3e,m4-single-only,m4-100-single-only,m4-200-single-only,m4-300-single-only,m4a-single-only \
|
||||||
|
m2a-single,m2a-single-only \
|
||||||
|
m4-single,m4-100-single,m4-200-single,m4-300-single,m4a-single \
|
||||||
|
- m4,m4-100,m4-200,m4-300,m4a; do \
|
||||||
|
+ m4,m4-100,m4-200,m4-300,m4a \
|
||||||
|
+ mj2; do \
|
||||||
|
subst= ; \
|
||||||
|
for lib in `echo $$abi|tr , ' '` ; do \
|
||||||
|
if test "`echo $$multilibs|sed s/$$lib//`" != "$$multilibs"; then \
|
||||||
|
@@ -63,9 +64,9 @@ MULTILIB_MATCHES = $(shell \
|
||||||
|
|
||||||
|
# SH1 and SH2A support big endian only.
|
||||||
|
ifeq ($(DEFAULT_ENDIAN),ml)
|
||||||
|
-MULTILIB_EXCEPTIONS = m1 ml/m1 m2a* ml/m2a* $(TM_MULTILIB_EXCEPTIONS_CONFIG)
|
||||||
|
+MULTILIB_EXCEPTIONS = m1 ml/m1 m2a* ml/m2a* ml/mj2 $(TM_MULTILIB_EXCEPTIONS_CONFIG)
|
||||||
|
else
|
||||||
|
-MULTILIB_EXCEPTIONS = ml/m1 ml/m2a* $(TM_MULTILIB_EXCEPTIONS_CONFIG)
|
||||||
|
+MULTILIB_EXCEPTIONS = ml/m1 ml/m2a* ml/mj2 $(TM_MULTILIB_EXCEPTIONS_CONFIG)
|
||||||
|
endif
|
||||||
|
|
||||||
|
MULTILIB_OSDIRNAMES = \
|
||||||
|
@@ -87,7 +88,8 @@ MULTILIB_OSDIRNAMES = \
|
||||||
|
m4a-single-only=!m4a-single-only $(OTHER_ENDIAN)/m4a-single-only=!$(OTHER_ENDIAN)/m4a-single-only \
|
||||||
|
m4a-single=!m4a-single $(OTHER_ENDIAN)/m4a-single=!$(OTHER_ENDIAN)/m4a-single \
|
||||||
|
m4a=!m4a $(OTHER_ENDIAN)/m4a=!$(OTHER_ENDIAN)/m4a \
|
||||||
|
- m4al=!m4al $(OTHER_ENDIAN)/m4al=!$(OTHER_ENDIAN)/m4al
|
||||||
|
+ m4al=!m4al $(OTHER_ENDIAN)/m4al=!$(OTHER_ENDIAN)/m4al \
|
||||||
|
+ mj2=!j2
|
||||||
|
|
||||||
|
$(out_object_file): gt-sh.h
|
||||||
|
gt-sh.h : s-gtype ; @true
|
||||||
|
|
@ -0,0 +1,92 @@
|
||||||
|
diff --git a/gcc/common.opt b/gcc/common.opt
|
||||||
|
index a75b44ee47e..7c564818b49 100644
|
||||||
|
--- a/gcc/common.opt
|
||||||
|
+++ b/gcc/common.opt
|
||||||
|
@@ -3473,11 +3473,11 @@ Driver
|
||||||
|
|
||||||
|
no-pie
|
||||||
|
Driver RejectNegative Negative(shared)
|
||||||
|
-Don't create a dynamically linked position independent executable.
|
||||||
|
+Don't create a position independent executable.
|
||||||
|
|
||||||
|
pie
|
||||||
|
Driver RejectNegative Negative(no-pie)
|
||||||
|
-Create a dynamically linked position independent executable.
|
||||||
|
+Create a position independent executable.
|
||||||
|
|
||||||
|
static-pie
|
||||||
|
Driver RejectNegative Negative(pie)
|
||||||
|
diff --git a/gcc/config/gnu-user.h b/gcc/config/gnu-user.h
|
||||||
|
index 5ebbf42a13d..bb907d8e89a 100644
|
||||||
|
--- a/gcc/config/gnu-user.h
|
||||||
|
+++ b/gcc/config/gnu-user.h
|
||||||
|
@@ -51,13 +51,12 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
|
||||||
|
#define GNU_USER_TARGET_STARTFILE_SPEC \
|
||||||
|
"%{shared:; \
|
||||||
|
pg|p|profile:%{static-pie:grcrt1.o%s;:gcrt1.o%s}; \
|
||||||
|
- static:crt1.o%s; \
|
||||||
|
- static-pie:rcrt1.o%s; \
|
||||||
|
+ static|static-pie:%{" PIE_SPEC ":rcrt1.o%s;:crt1.o%s}; \
|
||||||
|
" PIE_SPEC ":Scrt1.o%s; \
|
||||||
|
:crt1.o%s} " \
|
||||||
|
GNU_USER_TARGET_CRTI " \
|
||||||
|
- %{static:crtbeginT.o%s; \
|
||||||
|
- shared|static-pie|" PIE_SPEC ":crtbeginS.o%s; \
|
||||||
|
+ %{shared|" PIE_SPEC ":crtbeginS.o%s; \
|
||||||
|
+ static:crtbeginT.o%s; \
|
||||||
|
:crtbegin.o%s} \
|
||||||
|
%{fvtable-verify=none:%s; \
|
||||||
|
fvtable-verify=preinit:vtv_start_preinit.o%s; \
|
||||||
|
@@ -73,11 +72,11 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
|
||||||
|
GNU userspace "finalizer" file, `crtn.o'. */
|
||||||
|
|
||||||
|
#define GNU_USER_TARGET_ENDFILE_SPEC \
|
||||||
|
- "%{!static:%{fvtable-verify=none:%s; \
|
||||||
|
+ "%{static|static-pie:; \
|
||||||
|
+ fvtable-verify=none:%s; \
|
||||||
|
fvtable-verify=preinit:vtv_end_preinit.o%s; \
|
||||||
|
- fvtable-verify=std:vtv_end.o%s}} \
|
||||||
|
- %{static:crtend.o%s; \
|
||||||
|
- shared|static-pie|" PIE_SPEC ":crtendS.o%s; \
|
||||||
|
+ fvtable-verify=std:vtv_end.o%s} \
|
||||||
|
+ %{shared|" PIE_SPEC ":crtendS.o%s; \
|
||||||
|
:crtend.o%s} " \
|
||||||
|
GNU_USER_TARGET_CRTN " " \
|
||||||
|
CRTOFFLOADEND
|
||||||
|
@@ -106,7 +105,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
|
||||||
|
#define LIB_SPEC GNU_USER_TARGET_LIB_SPEC
|
||||||
|
|
||||||
|
#if defined(HAVE_LD_EH_FRAME_HDR)
|
||||||
|
-#define LINK_EH_SPEC "%{!static|static-pie:--eh-frame-hdr} "
|
||||||
|
+#define LINK_EH_SPEC "%{!static|" PIE_SPEC ":--eh-frame-hdr} "
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#define GNU_USER_TARGET_LINK_GCC_C_SEQUENCE_SPEC \
|
||||||
|
diff --git a/gcc/gcc.c b/gcc/gcc.c
|
||||||
|
index 3c81c5798d8..cd96eac5d12 100644
|
||||||
|
--- a/gcc/gcc.c
|
||||||
|
+++ b/gcc/gcc.c
|
||||||
|
@@ -1010,7 +1010,7 @@ proper position among the other output files. */
|
||||||
|
#define NO_FPIE_AND_FPIC_SPEC NO_FPIE_SPEC "|" NO_FPIC_SPEC
|
||||||
|
#define FPIE_OR_FPIC_SPEC NO_FPIE_AND_FPIC_SPEC ":;"
|
||||||
|
#else
|
||||||
|
-#define PIE_SPEC "pie"
|
||||||
|
+#define PIE_SPEC "pie|static-pie"
|
||||||
|
#define FPIE1_SPEC "fpie"
|
||||||
|
#define NO_FPIE1_SPEC FPIE1_SPEC ":;"
|
||||||
|
#define FPIE2_SPEC "fPIE"
|
||||||
|
@@ -1034,12 +1034,12 @@ proper position among the other output files. */
|
||||||
|
#ifndef LINK_PIE_SPEC
|
||||||
|
#ifdef HAVE_LD_PIE
|
||||||
|
#ifndef LD_PIE_SPEC
|
||||||
|
-#define LD_PIE_SPEC "-pie"
|
||||||
|
+#define LD_PIE_SPEC "-pie %{static|static-pie:--no-dynamic-linker -z text -Bsymbolic}"
|
||||||
|
#endif
|
||||||
|
#else
|
||||||
|
#define LD_PIE_SPEC ""
|
||||||
|
#endif
|
||||||
|
-#define LINK_PIE_SPEC "%{static|shared|r:;" PIE_SPEC ":" LD_PIE_SPEC "} "
|
||||||
|
+#define LINK_PIE_SPEC "%{shared|r:;" PIE_SPEC ":" LD_PIE_SPEC "} "
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef LINK_BUILDID_SPEC
|
||||||
|
|
@ -0,0 +1,20 @@
|
||||||
|
diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md
|
||||||
|
index 59a456cd496..dbfddea41bd 100644
|
||||||
|
--- a/gcc/config/m68k/m68k.md
|
||||||
|
+++ b/gcc/config/m68k/m68k.md
|
||||||
|
@@ -4174,13 +4174,13 @@
|
||||||
|
(define_expand "sqrt<mode>2"
|
||||||
|
[(set (match_operand:FP 0 "nonimmediate_operand" "")
|
||||||
|
(sqrt:FP (match_operand:FP 1 "general_operand" "")))]
|
||||||
|
- "TARGET_HARD_FLOAT"
|
||||||
|
+ "(TARGET_68881 && TARGET_68040) || TARGET_COLDFIRE_FPU"
|
||||||
|
"")
|
||||||
|
|
||||||
|
(define_insn "sqrt<mode>2_68881"
|
||||||
|
[(set (match_operand:FP 0 "nonimmediate_operand" "=f")
|
||||||
|
(sqrt:FP (match_operand:FP 1 "general_operand" "f<FP:dreg>m")))]
|
||||||
|
- "TARGET_68881"
|
||||||
|
+ "TARGET_68881 && TARGET_68040"
|
||||||
|
{
|
||||||
|
if (FP_REG_P (operands[1]))
|
||||||
|
return "f<FP:round>sqrt%.x %1,%0";
|
||||||
Loading…
Reference in New Issue