a93b8ec1df
Rename signal_processor* functions to sigp*. Add raw variants of each version, so we can get rid of the hacks played in smp code which establish temporary cpu logical mappings so they could call the sigp functions. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
134 lines
2.5 KiB
C
134 lines
2.5 KiB
C
/*
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* Routines and structures for signalling other processors.
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*
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* Copyright IBM Corp. 1999,2010
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* Author(s): Denis Joseph Barrow,
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* Martin Schwidefsky <schwidefsky@de.ibm.com>,
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* Heiko Carstens <heiko.carstens@de.ibm.com>,
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*/
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#ifndef __ASM_SIGP_H
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#define __ASM_SIGP_H
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#include <asm/system.h>
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/* Get real cpu address from logical cpu number. */
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extern unsigned short __cpu_logical_map[];
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static inline int cpu_logical_map(int cpu)
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{
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#ifdef CONFIG_SMP
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return __cpu_logical_map[cpu];
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#else
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return stap();
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#endif
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}
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enum {
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sigp_unassigned=0x0,
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sigp_sense,
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sigp_external_call,
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sigp_emergency_signal,
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sigp_start,
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sigp_stop,
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sigp_restart,
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sigp_unassigned1,
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sigp_unassigned2,
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sigp_stop_and_store_status,
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sigp_unassigned3,
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sigp_initial_cpu_reset,
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sigp_cpu_reset,
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sigp_set_prefix,
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sigp_store_status_at_address,
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sigp_store_extended_status_at_address
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};
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enum {
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sigp_order_code_accepted=0,
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sigp_status_stored,
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sigp_busy,
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sigp_not_operational
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};
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/*
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* Definitions for external call.
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*/
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enum {
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ec_schedule = 0,
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ec_call_function,
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ec_call_function_single,
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ec_bit_last
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};
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/*
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* Signal processor.
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*/
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static inline int raw_sigp(u16 cpu, int order)
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{
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register unsigned long reg1 asm ("1") = 0;
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int ccode;
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asm volatile(
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" sigp %1,%2,0(%3)\n"
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" ipm %0\n"
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" srl %0,28\n"
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: "=d" (ccode)
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: "d" (reg1), "d" (cpu),
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"a" (order) : "cc" , "memory");
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return ccode;
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}
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/*
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* Signal processor with parameter.
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*/
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static inline int raw_sigp_p(u32 parameter, u16 cpu, int order)
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{
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register unsigned int reg1 asm ("1") = parameter;
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int ccode;
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asm volatile(
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" sigp %1,%2,0(%3)\n"
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" ipm %0\n"
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" srl %0,28\n"
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: "=d" (ccode)
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: "d" (reg1), "d" (cpu),
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"a" (order) : "cc" , "memory");
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return ccode;
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}
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/*
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* Signal processor with parameter and return status.
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*/
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static inline int raw_sigp_ps(u32 *status, u32 parm, u16 cpu, int order)
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{
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register unsigned int reg1 asm ("1") = parm;
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int ccode;
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asm volatile(
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" sigp %1,%2,0(%3)\n"
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" ipm %0\n"
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" srl %0,28\n"
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: "=d" (ccode), "+d" (reg1)
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: "d" (cpu), "a" (order)
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: "cc" , "memory");
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*status = reg1;
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return ccode;
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}
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static inline int sigp(int cpu, int order)
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{
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return raw_sigp(cpu_logical_map(cpu), order);
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}
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static inline int sigp_p(u32 parameter, int cpu, int order)
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{
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return raw_sigp_p(parameter, cpu_logical_map(cpu), order);
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}
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static inline int sigp_ps(u32 *status, u32 parm, int cpu, int order)
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{
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return raw_sigp_ps(status, parm, cpu_logical_map(cpu), order);
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}
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#endif /* __ASM_SIGP_H */
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