
The ACPI handles of PCI root bridges need to be known to acpi_bind_one(), so that it can create the appropriate "firmware_node" and "physical_node" files for them, but currently the way it gets to know those handles is not exactly straightforward (to put it lightly). This is how it works, roughly: 1. acpi_bus_scan() finds the handle of a PCI root bridge, creates a struct acpi_device object for it and passes that object to acpi_pci_root_add(). 2. acpi_pci_root_add() creates a struct acpi_pci_root object, populates its "device" field with its argument's address (device->handle is the ACPI handle found in step 1). 3. The struct acpi_pci_root object created in step 2 is passed to pci_acpi_scan_root() and used to get resources that are passed to pci_create_root_bus(). 4. pci_create_root_bus() creates a struct pci_host_bridge object and passes its "dev" member to device_register(). 5. platform_notify(), which for systems with ACPI is set to acpi_platform_notify(), is called. So far, so good. Now it starts to be "interesting". 6. acpi_find_bridge_device() is used to find the ACPI handle of the given device (which is the PCI root bridge) and executes acpi_pci_find_root_bridge(), among other things, for the given device object. 7. acpi_pci_find_root_bridge() uses the name (sic!) of the given device object to extract the segment and bus numbers of the PCI root bridge and passes them to acpi_get_pci_rootbridge_handle(). 8. acpi_get_pci_rootbridge_handle() browses the list of ACPI PCI root bridges and finds the one that matches the given segment and bus numbers. Its handle is then used to initialize the ACPI handle of the PCI root bridge's device object by acpi_bind_one(). However, this is *exactly* the ACPI handle we started with in step 1. Needless to say, this is quite embarassing, but it may be avoided thanks to commit f3fd0c8 (ACPI: Allow ACPI handles of devices to be initialized in advance), which makes it possible to initialize the ACPI handle of a device before passing it to device_register(). Accordingly, add a new __weak routine, pcibios_root_bridge_prepare(), defaulting to an empty implementation that can be replaced by the interested architecutres (x86 and ia64 at the moment) with functions that will set the root bridge's ACPI handle before its dev member is passed to device_register(). Make both x86 and ia64 provide such implementations of pcibios_root_bridge_prepare() and remove acpi_pci_find_root_bridge() and acpi_get_pci_rootbridge_handle() that aren't necessary any more. Included is a fix for breakage on systems with non-ACPI PCI host bridges from Bjorn Helgaas. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
658 lines
17 KiB
C
658 lines
17 KiB
C
/*
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* pci_root.c - ACPI PCI Root Bridge Driver ($Revision: 40 $)
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*
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* Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
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* Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
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*
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* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or (at
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* your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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*
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* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/types.h>
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#include <linux/mutex.h>
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#include <linux/pm.h>
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#include <linux/pm_runtime.h>
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#include <linux/pci.h>
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#include <linux/pci-acpi.h>
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#include <linux/pci-aspm.h>
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#include <linux/acpi.h>
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#include <linux/slab.h>
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#include <acpi/acpi_bus.h>
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#include <acpi/acpi_drivers.h>
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#include <acpi/apei.h>
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#define PREFIX "ACPI: "
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#define _COMPONENT ACPI_PCI_COMPONENT
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ACPI_MODULE_NAME("pci_root");
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#define ACPI_PCI_ROOT_CLASS "pci_bridge"
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#define ACPI_PCI_ROOT_DEVICE_NAME "PCI Root Bridge"
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static int acpi_pci_root_add(struct acpi_device *device);
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static int acpi_pci_root_remove(struct acpi_device *device, int type);
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#define ACPI_PCIE_REQ_SUPPORT (OSC_EXT_PCI_CONFIG_SUPPORT \
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| OSC_ACTIVE_STATE_PWR_SUPPORT \
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| OSC_CLOCK_PWR_CAPABILITY_SUPPORT \
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| OSC_MSI_SUPPORT)
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static const struct acpi_device_id root_device_ids[] = {
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{"PNP0A03", 0},
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{"", 0},
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};
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MODULE_DEVICE_TABLE(acpi, root_device_ids);
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static struct acpi_driver acpi_pci_root_driver = {
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.name = "pci_root",
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.class = ACPI_PCI_ROOT_CLASS,
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.ids = root_device_ids,
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.ops = {
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.add = acpi_pci_root_add,
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.remove = acpi_pci_root_remove,
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},
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};
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/* Lock to protect both acpi_pci_roots and acpi_pci_drivers lists */
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static DEFINE_MUTEX(acpi_pci_root_lock);
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static LIST_HEAD(acpi_pci_roots);
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static LIST_HEAD(acpi_pci_drivers);
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static DEFINE_MUTEX(osc_lock);
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int acpi_pci_register_driver(struct acpi_pci_driver *driver)
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{
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int n = 0;
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struct acpi_pci_root *root;
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mutex_lock(&acpi_pci_root_lock);
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list_add_tail(&driver->node, &acpi_pci_drivers);
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if (driver->add)
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list_for_each_entry(root, &acpi_pci_roots, node) {
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driver->add(root);
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n++;
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}
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mutex_unlock(&acpi_pci_root_lock);
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return n;
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}
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EXPORT_SYMBOL(acpi_pci_register_driver);
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void acpi_pci_unregister_driver(struct acpi_pci_driver *driver)
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{
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struct acpi_pci_root *root;
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mutex_lock(&acpi_pci_root_lock);
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list_del(&driver->node);
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if (driver->remove)
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list_for_each_entry(root, &acpi_pci_roots, node)
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driver->remove(root);
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mutex_unlock(&acpi_pci_root_lock);
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}
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EXPORT_SYMBOL(acpi_pci_unregister_driver);
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/**
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* acpi_is_root_bridge - determine whether an ACPI CA node is a PCI root bridge
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* @handle - the ACPI CA node in question.
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*
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* Note: we could make this API take a struct acpi_device * instead, but
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* for now, it's more convenient to operate on an acpi_handle.
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*/
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int acpi_is_root_bridge(acpi_handle handle)
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{
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int ret;
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struct acpi_device *device;
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ret = acpi_bus_get_device(handle, &device);
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if (ret)
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return 0;
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ret = acpi_match_device_ids(device, root_device_ids);
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if (ret)
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return 0;
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else
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return 1;
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}
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EXPORT_SYMBOL_GPL(acpi_is_root_bridge);
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static acpi_status
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get_root_bridge_busnr_callback(struct acpi_resource *resource, void *data)
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{
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struct resource *res = data;
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struct acpi_resource_address64 address;
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if (resource->type != ACPI_RESOURCE_TYPE_ADDRESS16 &&
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resource->type != ACPI_RESOURCE_TYPE_ADDRESS32 &&
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resource->type != ACPI_RESOURCE_TYPE_ADDRESS64)
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return AE_OK;
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acpi_resource_to_address64(resource, &address);
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if ((address.address_length > 0) &&
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(address.resource_type == ACPI_BUS_NUMBER_RANGE)) {
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res->start = address.minimum;
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res->end = address.minimum + address.address_length - 1;
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}
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return AE_OK;
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}
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static acpi_status try_get_root_bridge_busnr(acpi_handle handle,
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struct resource *res)
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{
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acpi_status status;
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res->start = -1;
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status =
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acpi_walk_resources(handle, METHOD_NAME__CRS,
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get_root_bridge_busnr_callback, res);
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if (ACPI_FAILURE(status))
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return status;
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if (res->start == -1)
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return AE_ERROR;
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return AE_OK;
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}
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static u8 pci_osc_uuid_str[] = "33DB4D5B-1FF7-401C-9657-7441C03DD766";
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static acpi_status acpi_pci_run_osc(acpi_handle handle,
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const u32 *capbuf, u32 *retval)
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{
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struct acpi_osc_context context = {
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.uuid_str = pci_osc_uuid_str,
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.rev = 1,
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.cap.length = 12,
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.cap.pointer = (void *)capbuf,
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};
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acpi_status status;
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status = acpi_run_osc(handle, &context);
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if (ACPI_SUCCESS(status)) {
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*retval = *((u32 *)(context.ret.pointer + 8));
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kfree(context.ret.pointer);
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}
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return status;
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}
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static acpi_status acpi_pci_query_osc(struct acpi_pci_root *root,
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u32 support,
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u32 *control)
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{
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acpi_status status;
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u32 result, capbuf[3];
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support &= OSC_PCI_SUPPORT_MASKS;
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support |= root->osc_support_set;
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capbuf[OSC_QUERY_TYPE] = OSC_QUERY_ENABLE;
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capbuf[OSC_SUPPORT_TYPE] = support;
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if (control) {
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*control &= OSC_PCI_CONTROL_MASKS;
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capbuf[OSC_CONTROL_TYPE] = *control | root->osc_control_set;
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} else {
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/* Run _OSC query for all possible controls. */
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capbuf[OSC_CONTROL_TYPE] = OSC_PCI_CONTROL_MASKS;
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}
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status = acpi_pci_run_osc(root->device->handle, capbuf, &result);
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if (ACPI_SUCCESS(status)) {
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root->osc_support_set = support;
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if (control)
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*control = result;
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}
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return status;
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}
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static acpi_status acpi_pci_osc_support(struct acpi_pci_root *root, u32 flags)
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{
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acpi_status status;
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acpi_handle tmp;
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status = acpi_get_handle(root->device->handle, "_OSC", &tmp);
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if (ACPI_FAILURE(status))
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return status;
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mutex_lock(&osc_lock);
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status = acpi_pci_query_osc(root, flags, NULL);
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mutex_unlock(&osc_lock);
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return status;
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}
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struct acpi_pci_root *acpi_pci_find_root(acpi_handle handle)
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{
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struct acpi_pci_root *root;
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struct acpi_device *device;
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if (acpi_bus_get_device(handle, &device) ||
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acpi_match_device_ids(device, root_device_ids))
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return NULL;
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root = acpi_driver_data(device);
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return root;
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}
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EXPORT_SYMBOL_GPL(acpi_pci_find_root);
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struct acpi_handle_node {
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struct list_head node;
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acpi_handle handle;
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};
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/**
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* acpi_get_pci_dev - convert ACPI CA handle to struct pci_dev
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* @handle: the handle in question
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*
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* Given an ACPI CA handle, the desired PCI device is located in the
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* list of PCI devices.
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*
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* If the device is found, its reference count is increased and this
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* function returns a pointer to its data structure. The caller must
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* decrement the reference count by calling pci_dev_put().
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* If no device is found, %NULL is returned.
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*/
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struct pci_dev *acpi_get_pci_dev(acpi_handle handle)
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{
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int dev, fn;
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unsigned long long adr;
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acpi_status status;
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acpi_handle phandle;
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struct pci_bus *pbus;
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struct pci_dev *pdev = NULL;
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struct acpi_handle_node *node, *tmp;
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struct acpi_pci_root *root;
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LIST_HEAD(device_list);
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/*
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* Walk up the ACPI CA namespace until we reach a PCI root bridge.
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*/
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phandle = handle;
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while (!acpi_is_root_bridge(phandle)) {
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node = kzalloc(sizeof(struct acpi_handle_node), GFP_KERNEL);
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if (!node)
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goto out;
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INIT_LIST_HEAD(&node->node);
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node->handle = phandle;
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list_add(&node->node, &device_list);
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status = acpi_get_parent(phandle, &phandle);
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if (ACPI_FAILURE(status))
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goto out;
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}
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root = acpi_pci_find_root(phandle);
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if (!root)
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goto out;
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pbus = root->bus;
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/*
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* Now, walk back down the PCI device tree until we return to our
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* original handle. Assumes that everything between the PCI root
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* bridge and the device we're looking for must be a P2P bridge.
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*/
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list_for_each_entry(node, &device_list, node) {
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acpi_handle hnd = node->handle;
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status = acpi_evaluate_integer(hnd, "_ADR", NULL, &adr);
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if (ACPI_FAILURE(status))
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goto out;
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dev = (adr >> 16) & 0xffff;
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fn = adr & 0xffff;
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pdev = pci_get_slot(pbus, PCI_DEVFN(dev, fn));
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if (!pdev || hnd == handle)
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break;
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pbus = pdev->subordinate;
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pci_dev_put(pdev);
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/*
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* This function may be called for a non-PCI device that has a
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* PCI parent (eg. a disk under a PCI SATA controller). In that
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* case pdev->subordinate will be NULL for the parent.
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*/
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if (!pbus) {
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dev_dbg(&pdev->dev, "Not a PCI-to-PCI bridge\n");
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pdev = NULL;
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break;
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}
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}
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out:
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list_for_each_entry_safe(node, tmp, &device_list, node)
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kfree(node);
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return pdev;
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}
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EXPORT_SYMBOL_GPL(acpi_get_pci_dev);
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/**
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* acpi_pci_osc_control_set - Request control of PCI root _OSC features.
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* @handle: ACPI handle of a PCI root bridge (or PCIe Root Complex).
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* @mask: Mask of _OSC bits to request control of, place to store control mask.
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* @req: Mask of _OSC bits the control of is essential to the caller.
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*
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* Run _OSC query for @mask and if that is successful, compare the returned
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* mask of control bits with @req. If all of the @req bits are set in the
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* returned mask, run _OSC request for it.
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*
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* The variable at the @mask address may be modified regardless of whether or
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* not the function returns success. On success it will contain the mask of
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* _OSC bits the BIOS has granted control of, but its contents are meaningless
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* on failure.
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**/
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acpi_status acpi_pci_osc_control_set(acpi_handle handle, u32 *mask, u32 req)
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{
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struct acpi_pci_root *root;
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acpi_status status;
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u32 ctrl, capbuf[3];
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acpi_handle tmp;
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if (!mask)
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return AE_BAD_PARAMETER;
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ctrl = *mask & OSC_PCI_CONTROL_MASKS;
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if ((ctrl & req) != req)
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return AE_TYPE;
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root = acpi_pci_find_root(handle);
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if (!root)
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return AE_NOT_EXIST;
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status = acpi_get_handle(handle, "_OSC", &tmp);
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if (ACPI_FAILURE(status))
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return status;
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mutex_lock(&osc_lock);
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*mask = ctrl | root->osc_control_set;
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/* No need to evaluate _OSC if the control was already granted. */
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if ((root->osc_control_set & ctrl) == ctrl)
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goto out;
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/* Need to check the available controls bits before requesting them. */
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while (*mask) {
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status = acpi_pci_query_osc(root, root->osc_support_set, mask);
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if (ACPI_FAILURE(status))
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goto out;
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if (ctrl == *mask)
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break;
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ctrl = *mask;
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}
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if ((ctrl & req) != req) {
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status = AE_SUPPORT;
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goto out;
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}
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capbuf[OSC_QUERY_TYPE] = 0;
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capbuf[OSC_SUPPORT_TYPE] = root->osc_support_set;
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capbuf[OSC_CONTROL_TYPE] = ctrl;
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status = acpi_pci_run_osc(handle, capbuf, mask);
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if (ACPI_SUCCESS(status))
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root->osc_control_set = *mask;
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out:
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mutex_unlock(&osc_lock);
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return status;
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}
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EXPORT_SYMBOL(acpi_pci_osc_control_set);
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static int acpi_pci_root_add(struct acpi_device *device)
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{
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unsigned long long segment, bus;
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acpi_status status;
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int result;
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struct acpi_pci_root *root;
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acpi_handle handle;
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struct acpi_pci_driver *driver;
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u32 flags, base_flags;
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bool is_osc_granted = false;
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root = kzalloc(sizeof(struct acpi_pci_root), GFP_KERNEL);
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if (!root)
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return -ENOMEM;
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segment = 0;
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status = acpi_evaluate_integer(device->handle, METHOD_NAME__SEG, NULL,
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&segment);
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if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) {
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printk(KERN_ERR PREFIX "can't evaluate _SEG\n");
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result = -ENODEV;
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goto end;
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}
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/* Check _CRS first, then _BBN. If no _BBN, default to zero. */
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root->secondary.flags = IORESOURCE_BUS;
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status = try_get_root_bridge_busnr(device->handle, &root->secondary);
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if (ACPI_FAILURE(status)) {
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/*
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* We need both the start and end of the downstream bus range
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* to interpret _CBA (MMCONFIG base address), so it really is
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* supposed to be in _CRS. If we don't find it there, all we
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* can do is assume [_BBN-0xFF] or [0-0xFF].
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*/
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root->secondary.end = 0xFF;
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printk(KERN_WARNING FW_BUG PREFIX
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"no secondary bus range in _CRS\n");
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status = acpi_evaluate_integer(device->handle, METHOD_NAME__BBN,
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NULL, &bus);
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if (ACPI_SUCCESS(status))
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root->secondary.start = bus;
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else if (status == AE_NOT_FOUND)
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root->secondary.start = 0;
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else {
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printk(KERN_ERR PREFIX "can't evaluate _BBN\n");
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result = -ENODEV;
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goto end;
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}
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}
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|
|
INIT_LIST_HEAD(&root->node);
|
|
root->device = device;
|
|
root->segment = segment & 0xFFFF;
|
|
strcpy(acpi_device_name(device), ACPI_PCI_ROOT_DEVICE_NAME);
|
|
strcpy(acpi_device_class(device), ACPI_PCI_ROOT_CLASS);
|
|
device->driver_data = root;
|
|
|
|
printk(KERN_INFO PREFIX "%s [%s] (domain %04x %pR)\n",
|
|
acpi_device_name(device), acpi_device_bid(device),
|
|
root->segment, &root->secondary);
|
|
|
|
/*
|
|
* PCI Routing Table
|
|
* -----------------
|
|
* Evaluate and parse _PRT, if exists.
|
|
*/
|
|
status = acpi_get_handle(device->handle, METHOD_NAME__PRT, &handle);
|
|
if (ACPI_SUCCESS(status))
|
|
result = acpi_pci_irq_add_prt(device->handle, root->segment,
|
|
root->secondary.start);
|
|
|
|
root->mcfg_addr = acpi_pci_root_get_mcfg_addr(device->handle);
|
|
|
|
/*
|
|
* All supported architectures that use ACPI have support for
|
|
* PCI domains, so we indicate this in _OSC support capabilities.
|
|
*/
|
|
flags = base_flags = OSC_PCI_SEGMENT_GROUPS_SUPPORT;
|
|
acpi_pci_osc_support(root, flags);
|
|
|
|
/* Indicate support for various _OSC capabilities. */
|
|
if (pci_ext_cfg_avail())
|
|
flags |= OSC_EXT_PCI_CONFIG_SUPPORT;
|
|
if (pcie_aspm_support_enabled()) {
|
|
flags |= OSC_ACTIVE_STATE_PWR_SUPPORT |
|
|
OSC_CLOCK_PWR_CAPABILITY_SUPPORT;
|
|
}
|
|
if (pci_msi_enabled())
|
|
flags |= OSC_MSI_SUPPORT;
|
|
if (flags != base_flags) {
|
|
status = acpi_pci_osc_support(root, flags);
|
|
if (ACPI_FAILURE(status)) {
|
|
dev_info(&device->dev, "ACPI _OSC support "
|
|
"notification failed, disabling PCIe ASPM\n");
|
|
pcie_no_aspm();
|
|
flags = base_flags;
|
|
}
|
|
}
|
|
if (!pcie_ports_disabled
|
|
&& (flags & ACPI_PCIE_REQ_SUPPORT) == ACPI_PCIE_REQ_SUPPORT) {
|
|
flags = OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL
|
|
| OSC_PCI_EXPRESS_NATIVE_HP_CONTROL
|
|
| OSC_PCI_EXPRESS_PME_CONTROL;
|
|
|
|
if (pci_aer_available()) {
|
|
if (aer_acpi_firmware_first())
|
|
dev_dbg(&device->dev,
|
|
"PCIe errors handled by BIOS.\n");
|
|
else
|
|
flags |= OSC_PCI_EXPRESS_AER_CONTROL;
|
|
}
|
|
|
|
dev_info(&device->dev,
|
|
"Requesting ACPI _OSC control (0x%02x)\n", flags);
|
|
|
|
status = acpi_pci_osc_control_set(device->handle, &flags,
|
|
OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL);
|
|
if (ACPI_SUCCESS(status)) {
|
|
is_osc_granted = true;
|
|
dev_info(&device->dev,
|
|
"ACPI _OSC control (0x%02x) granted\n", flags);
|
|
} else {
|
|
is_osc_granted = false;
|
|
dev_info(&device->dev,
|
|
"ACPI _OSC request failed (%s), "
|
|
"returned control mask: 0x%02x\n",
|
|
acpi_format_exception(status), flags);
|
|
}
|
|
} else {
|
|
dev_info(&device->dev,
|
|
"Unable to request _OSC control "
|
|
"(_OSC support mask: 0x%02x)\n", flags);
|
|
}
|
|
|
|
/*
|
|
* TBD: Need PCI interface for enumeration/configuration of roots.
|
|
*/
|
|
|
|
mutex_lock(&acpi_pci_root_lock);
|
|
list_add_tail(&root->node, &acpi_pci_roots);
|
|
mutex_unlock(&acpi_pci_root_lock);
|
|
|
|
/*
|
|
* Scan the Root Bridge
|
|
* --------------------
|
|
* Must do this prior to any attempt to bind the root device, as the
|
|
* PCI namespace does not get created until this call is made (and
|
|
* thus the root bridge's pci_dev does not exist).
|
|
*/
|
|
root->bus = pci_acpi_scan_root(root);
|
|
if (!root->bus) {
|
|
printk(KERN_ERR PREFIX
|
|
"Bus %04x:%02x not present in PCI namespace\n",
|
|
root->segment, (unsigned int)root->secondary.start);
|
|
result = -ENODEV;
|
|
goto out_del_root;
|
|
}
|
|
|
|
/* ASPM setting */
|
|
if (is_osc_granted) {
|
|
if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM)
|
|
pcie_clear_aspm(root->bus);
|
|
} else {
|
|
pr_info("ACPI _OSC control for PCIe not granted, "
|
|
"disabling ASPM\n");
|
|
pcie_no_aspm();
|
|
}
|
|
|
|
pci_acpi_add_bus_pm_notifier(device, root->bus);
|
|
if (device->wakeup.flags.run_wake)
|
|
device_set_run_wake(root->bus->bridge, true);
|
|
|
|
if (system_state != SYSTEM_BOOTING) {
|
|
pcibios_resource_survey_bus(root->bus);
|
|
pci_assign_unassigned_bus_resources(root->bus);
|
|
}
|
|
|
|
mutex_lock(&acpi_pci_root_lock);
|
|
list_for_each_entry(driver, &acpi_pci_drivers, node)
|
|
if (driver->add)
|
|
driver->add(root);
|
|
mutex_unlock(&acpi_pci_root_lock);
|
|
|
|
/* need to after hot-added ioapic is registered */
|
|
if (system_state != SYSTEM_BOOTING)
|
|
pci_enable_bridges(root->bus);
|
|
|
|
pci_bus_add_devices(root->bus);
|
|
return 0;
|
|
|
|
out_del_root:
|
|
mutex_lock(&acpi_pci_root_lock);
|
|
list_del(&root->node);
|
|
mutex_unlock(&acpi_pci_root_lock);
|
|
|
|
acpi_pci_irq_del_prt(root->segment, root->secondary.start);
|
|
end:
|
|
kfree(root);
|
|
return result;
|
|
}
|
|
|
|
static int acpi_pci_root_remove(struct acpi_device *device, int type)
|
|
{
|
|
acpi_status status;
|
|
acpi_handle handle;
|
|
struct acpi_pci_root *root = acpi_driver_data(device);
|
|
struct acpi_pci_driver *driver;
|
|
|
|
pci_stop_root_bus(root->bus);
|
|
|
|
mutex_lock(&acpi_pci_root_lock);
|
|
list_for_each_entry_reverse(driver, &acpi_pci_drivers, node)
|
|
if (driver->remove)
|
|
driver->remove(root);
|
|
mutex_unlock(&acpi_pci_root_lock);
|
|
|
|
device_set_run_wake(root->bus->bridge, false);
|
|
pci_acpi_remove_bus_pm_notifier(device);
|
|
|
|
status = acpi_get_handle(device->handle, METHOD_NAME__PRT, &handle);
|
|
if (ACPI_SUCCESS(status))
|
|
acpi_pci_irq_del_prt(root->segment, root->secondary.start);
|
|
|
|
pci_remove_root_bus(root->bus);
|
|
|
|
mutex_lock(&acpi_pci_root_lock);
|
|
list_del(&root->node);
|
|
mutex_unlock(&acpi_pci_root_lock);
|
|
kfree(root);
|
|
return 0;
|
|
}
|
|
|
|
int __init acpi_pci_root_init(void)
|
|
{
|
|
acpi_hest_init();
|
|
|
|
if (acpi_pci_disabled)
|
|
return 0;
|
|
|
|
pci_acpi_crs_quirks();
|
|
if (acpi_bus_register_driver(&acpi_pci_root_driver) < 0)
|
|
return -ENODEV;
|
|
|
|
return 0;
|
|
}
|