
This is an internal error as the CRISv10 should mask interrupts while executing delay slots. Bail out sooner rather than later. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
This is an internal error as the CRISv10 should mask interrupts while executing delay slots. Bail out sooner rather than later. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>