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ahci: adjust ahci_mem_write to work on registers

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Actually, this function looks pretty broken, but for now, let's finish
up what this series of commits came here to do.

Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20180531222835.16558-15-jsnow@redhat.com
Signed-off-by: John Snow <jsnow@redhat.com>
This commit is contained in:
John Snow 2018-06-08 13:17:38 -04:00
parent 467378baed
commit d566811a10
1 changed files with 9 additions and 6 deletions
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15
hw/ide/ahci.c
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@ -468,11 +468,14 @@ static void ahci_mem_write(void *opaque, hwaddr addr,
} }
if (addr < AHCI_GENERIC_HOST_CONTROL_REGS_MAX_ADDR) { if (addr < AHCI_GENERIC_HOST_CONTROL_REGS_MAX_ADDR) {
switch (addr) { enum AHCIHostReg regnum = addr / 4;
case HOST_CAP: /* R/WO, RO */ assert(regnum < AHCI_HOST_REG__COUNT);
switch (regnum) {
case AHCI_HOST_REG_CAP: /* R/WO, RO */
/* FIXME handle R/WO */ /* FIXME handle R/WO */
break; break;
case HOST_CTL: /* R/W */ case AHCI_HOST_REG_CTL: /* R/W */
if (val & HOST_CTL_RESET) { if (val & HOST_CTL_RESET) {
ahci_reset(s); ahci_reset(s);
} else { } else {
@ -480,14 +483,14 @@ static void ahci_mem_write(void *opaque, hwaddr addr,
ahci_check_irq(s); ahci_check_irq(s);
} }
break; break;
case HOST_IRQ_STAT: /* R/WC, RO */ case AHCI_HOST_REG_IRQ_STAT: /* R/WC, RO */
s->control_regs.irqstatus &= ~val; s->control_regs.irqstatus &= ~val;
ahci_check_irq(s); ahci_check_irq(s);
break; break;
case HOST_PORTS_IMPL: /* R/WO, RO */ case AHCI_HOST_REG_PORTS_IMPL: /* R/WO, RO */
/* FIXME handle R/WO */ /* FIXME handle R/WO */
break; break;
case HOST_VERSION: /* RO */ case AHCI_HOST_REG_VERSION: /* RO */
/* FIXME report write? */ /* FIXME report write? */
break; break;
default: default: