target-arm: Refactor to pull narrowing decode into separate function
Pull the code which decodes narrowing operations as being either signed/unsigned saturate or plain out into its own function. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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@ -4164,6 +4164,23 @@ static inline void gen_neon_mull(TCGv_i64 dest, TCGv a, TCGv b, int size, int u)
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}
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}
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}
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}
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static void gen_neon_narrow_op(int op, int u, int size, TCGv dest, TCGv_i64 src)
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{
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if (op) {
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if (u) {
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gen_neon_unarrow_sats(size, dest, src);
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} else {
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gen_neon_narrow(size, dest, src);
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}
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} else {
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if (u) {
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gen_neon_narrow_satu(size, dest, src);
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} else {
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gen_neon_narrow_sats(size, dest, src);
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}
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}
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}
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/* Translate a NEON data processing instruction. Return nonzero if the
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/* Translate a NEON data processing instruction. Return nonzero if the
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instruction is invalid.
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instruction is invalid.
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We process data in a mixture of 32-bit and 64-bit chunks.
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We process data in a mixture of 32-bit and 64-bit chunks.
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@ -4839,19 +4856,7 @@ static int disas_neon_data_insn(CPUState * env, DisasContext *s, uint32_t insn)
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dead_tmp(tmp3);
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dead_tmp(tmp3);
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}
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}
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tmp = new_tmp();
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tmp = new_tmp();
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if (op == 8) {
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gen_neon_narrow_op(op == 8, u, size - 1, tmp, cpu_V0);
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if (u) { /* VQSHRUN / VQRSHRUN */
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gen_neon_unarrow_sats(size - 1, tmp, cpu_V0);
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} else { /* VSHRN / VRSHRN */
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gen_neon_narrow(size - 1, tmp, cpu_V0);
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}
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} else {
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if (u) { /* VQSHRN / VQRSHRN */
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gen_neon_narrow_satu(size - 1, tmp, cpu_V0);
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} else { /* VQSHRN / VQRSHRN */
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gen_neon_narrow_sats(size - 1, tmp, cpu_V0);
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}
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}
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neon_store_reg(rd, pass, tmp);
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neon_store_reg(rd, pass, tmp);
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} /* for pass */
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} /* for pass */
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if (size == 3) {
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if (size == 3) {
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@ -5439,19 +5444,7 @@ static int disas_neon_data_insn(CPUState * env, DisasContext *s, uint32_t insn)
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for (pass = 0; pass < 2; pass++) {
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for (pass = 0; pass < 2; pass++) {
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neon_load_reg64(cpu_V0, rm + pass);
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neon_load_reg64(cpu_V0, rm + pass);
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tmp = new_tmp();
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tmp = new_tmp();
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if (op == 36) {
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gen_neon_narrow_op(op == 36, q, size, tmp, cpu_V0);
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if (q) { /* VQMOVUN */
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gen_neon_unarrow_sats(size, tmp, cpu_V0);
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} else { /* VMOVN */
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gen_neon_narrow(size, tmp, cpu_V0);
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}
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} else { /* VQMOVN */
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if (q) {
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gen_neon_narrow_satu(size, tmp, cpu_V0);
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} else {
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gen_neon_narrow_sats(size, tmp, cpu_V0);
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}
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}
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if (pass == 0) {
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if (pass == 0) {
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tmp2 = tmp;
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tmp2 = tmp;
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} else {
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} else {
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