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hw/timer/lm32_timer: Switch to transaction-based ptimer API

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Switch the lm32_timer code away from bottom-half based ptimers to the
new transaction-based ptimer API.  This just requires adding
begin/commit calls around the various places that modify the ptimer
state, and using the new ptimer_init() function to create the ytimer.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20191017132905.5604-4-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2019-10-22 16:50:36 +01:00
parent 28015830d9
commit b360a65cf9
1 changed files with 9 additions and 4 deletions
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13
hw/timer/lm32_timer.c
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@ -30,7 +30,6 @@
#include "hw/ptimer.h" #include "hw/ptimer.h"
#include "hw/qdev-properties.h" #include "hw/qdev-properties.h"
#include "qemu/error-report.h" #include "qemu/error-report.h"
#include "qemu/main-loop.h"
#include "qemu/module.h" #include "qemu/module.h"
#define DEFAULT_FREQUENCY (50*1000000) #define DEFAULT_FREQUENCY (50*1000000)
@ -63,7 +62,6 @@ struct LM32TimerState {
MemoryRegion iomem; MemoryRegion iomem;
QEMUBH *bh;
ptimer_state *ptimer; ptimer_state *ptimer;
qemu_irq irq; qemu_irq irq;
@ -119,6 +117,7 @@ static void timer_write(void *opaque, hwaddr addr,
s->regs[R_SR] &= ~SR_TO; s->regs[R_SR] &= ~SR_TO;
break; break;
case R_CR: case R_CR:
ptimer_transaction_begin(s->ptimer);
s->regs[R_CR] = value; s->regs[R_CR] = value;
if (s->regs[R_CR] & CR_START) { if (s->regs[R_CR] & CR_START) {
ptimer_run(s->ptimer, 1); ptimer_run(s->ptimer, 1);
@ -126,10 +125,13 @@ static void timer_write(void *opaque, hwaddr addr,
if (s->regs[R_CR] & CR_STOP) { if (s->regs[R_CR] & CR_STOP) {
ptimer_stop(s->ptimer); ptimer_stop(s->ptimer);
} }
ptimer_transaction_commit(s->ptimer);
break; break;
case R_PERIOD: case R_PERIOD:
s->regs[R_PERIOD] = value; s->regs[R_PERIOD] = value;
ptimer_transaction_begin(s->ptimer);
ptimer_set_count(s->ptimer, value); ptimer_set_count(s->ptimer, value);
ptimer_transaction_commit(s->ptimer);
break; break;
case R_SNAPSHOT: case R_SNAPSHOT:
error_report("lm32_timer: write access to read only register 0x" error_report("lm32_timer: write access to read only register 0x"
@ -176,7 +178,9 @@ static void timer_reset(DeviceState *d)
for (i = 0; i < R_MAX; i++) { for (i = 0; i < R_MAX; i++) {
s->regs[i] = 0; s->regs[i] = 0;
} }
ptimer_transaction_begin(s->ptimer);
ptimer_stop(s->ptimer); ptimer_stop(s->ptimer);
ptimer_transaction_commit(s->ptimer);
} }
static void lm32_timer_init(Object *obj) static void lm32_timer_init(Object *obj)
@ -195,10 +199,11 @@ static void lm32_timer_realize(DeviceState *dev, Error **errp)
{ {
LM32TimerState *s = LM32_TIMER(dev); LM32TimerState *s = LM32_TIMER(dev);
s->bh = qemu_bh_new(timer_hit, s); s->ptimer = ptimer_init(timer_hit, s, PTIMER_POLICY_DEFAULT);
s->ptimer = ptimer_init_with_bh(s->bh, PTIMER_POLICY_DEFAULT);
ptimer_transaction_begin(s->ptimer);
ptimer_set_freq(s->ptimer, s->freq_hz); ptimer_set_freq(s->ptimer, s->freq_hz);
ptimer_transaction_commit(s->ptimer);
} }
static const VMStateDescription vmstate_lm32_timer = { static const VMStateDescription vmstate_lm32_timer = {