target/arm: Align vector registers
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -492,7 +492,7 @@ typedef struct CPUARMState {
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* the two execution states, and means we do not need to explicitly
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* the two execution states, and means we do not need to explicitly
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* map these registers when changing states.
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* map these registers when changing states.
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*/
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*/
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uint64_t regs[64];
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uint64_t regs[64] QEMU_ALIGNED(16);
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uint32_t xregs[16];
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uint32_t xregs[16];
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/* We store these fpcsr fields separately for convenience. */
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/* We store these fpcsr fields separately for convenience. */
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