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sd/sdhci.c: Only reset data_count on new commands

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The data_count variable was being reset on every transfer, including
DMA transfer resumptions. This is incorrect, it should only be set
on a new command.

Manifests as a bug when using ADMA and there is a timer delay between
ADMA frames where the fifo is left in a non empty state.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Igor Mitsyanko <i.mitsyanko@gmail.com>
Message-id: 15a98609cc32315211b0963091a8efd67522e160.1369370934.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Crosthwaite 2013-06-03 17:17:44 +01:00 committed by Peter Maydell
parent b0b7ae6259
commit 656f416c65
1 changed files with 1 additions and 1 deletions
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2
hw/sd/sdhci.c
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@ -260,6 +260,7 @@ static void sdhci_send_command(SDHCIState *s)
sdhci_update_irq(s); sdhci_update_irq(s);
if (s->blksize && (s->cmdreg & SDHC_CMD_DATA_PRESENT)) { if (s->blksize && (s->cmdreg & SDHC_CMD_DATA_PRESENT)) {
s->data_count = 0;
sdhci_do_data_transfer(s); sdhci_do_data_transfer(s);
} }
} }
@ -773,7 +774,6 @@ static void sdhci_do_adma(SDHCIState *s)
static void sdhci_data_transfer(SDHCIState *s) static void sdhci_data_transfer(SDHCIState *s)
{ {
SDHCIClass *k = SDHCI_GET_CLASS(s); SDHCIClass *k = SDHCI_GET_CLASS(s);
s->data_count = 0;
if (s->trnmod & SDHC_TRNS_DMA) { if (s->trnmod & SDHC_TRNS_DMA) {
switch (SDHC_DMA_TYPE(s->hostctl)) { switch (SDHC_DMA_TYPE(s->hostctl)) {