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Make detection of unsupported hosts easier, inspired by a patch from

Browse Source 
Stefan Weil.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2791 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
ths 2007-05-08 23:30:44 +00:00
parent 85028e4db6
commit 522777bbaf
2 changed files with 41 additions and 80 deletions
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62
dyngen-exec.h
View File

@ -89,21 +89,19 @@ extern int printf(const char *, ...);
#undef NULL #undef NULL
#define NULL 0 #define NULL 0
#ifdef __i386__ #if defined(__i386__)
#define AREG0 "ebp" #define AREG0 "ebp"
#define AREG1 "ebx" #define AREG1 "ebx"
#define AREG2 "esi" #define AREG2 "esi"
#define AREG3 "edi" #define AREG3 "edi"
#endif #elif defined(__x86_64__)
#ifdef __x86_64__
#define AREG0 "r14" #define AREG0 "r14"
#define AREG1 "r15" #define AREG1 "r15"
#define AREG2 "r12" #define AREG2 "r12"
#define AREG3 "r13" #define AREG3 "r13"
//#define AREG4 "rbp" //#define AREG4 "rbp"
//#define AREG5 "rbx" //#define AREG5 "rbx"
#endif #elif defined(__powerpc__)
#ifdef __powerpc__
#define AREG0 "r27" #define AREG0 "r27"
#define AREG1 "r24" #define AREG1 "r24"
#define AREG2 "r25" #define AREG2 "r25"
@ -121,14 +119,12 @@ extern int printf(const char *, ...);
#endif #endif
#define USE_INT_TO_FLOAT_HELPERS #define USE_INT_TO_FLOAT_HELPERS
#define BUGGY_GCC_DIV64 #define BUGGY_GCC_DIV64
#endif #elif defined(__arm__)
#ifdef __arm__
#define AREG0 "r7" #define AREG0 "r7"
#define AREG1 "r4" #define AREG1 "r4"
#define AREG2 "r5" #define AREG2 "r5"
#define AREG3 "r6" #define AREG3 "r6"
#endif #elif defined(__mips__)
#ifdef __mips__
#define AREG0 "fp" #define AREG0 "fp"
#define AREG1 "s0" #define AREG1 "s0"
#define AREG2 "s1" #define AREG2 "s1"
@ -138,8 +134,7 @@ extern int printf(const char *, ...);
#define AREG6 "s5" #define AREG6 "s5"
#define AREG7 "s6" #define AREG7 "s6"
#define AREG8 "s7" #define AREG8 "s7"
#endif #elif defined(__sparc__)
#ifdef __sparc__
#ifdef HOST_SOLARIS #ifdef HOST_SOLARIS
#define AREG0 "g2" #define AREG0 "g2"
#define AREG1 "g3" #define AREG1 "g3"
@ -168,14 +163,12 @@ extern int printf(const char *, ...);
#endif #endif
#endif #endif
#define USE_FP_CONVERT #define USE_FP_CONVERT
#endif #elif defined(__s390__)
#ifdef __s390__
#define AREG0 "r10" #define AREG0 "r10"
#define AREG1 "r7" #define AREG1 "r7"
#define AREG2 "r8" #define AREG2 "r8"
#define AREG3 "r9" #define AREG3 "r9"
#endif #elif defined(__alpha__)
#ifdef __alpha__
/* Note $15 is the frame pointer, so anything in op-i386.c that would /* Note $15 is the frame pointer, so anything in op-i386.c that would
require a frame pointer, like alloca, would probably loose. */ require a frame pointer, like alloca, would probably loose. */
#define AREG0 "$15" #define AREG0 "$15"
@ -185,19 +178,19 @@ extern int printf(const char *, ...);
#define AREG4 "$12" #define AREG4 "$12"
#define AREG5 "$13" #define AREG5 "$13"
#define AREG6 "$14" #define AREG6 "$14"
#endif #elif defined(__mc68000)
#ifdef __mc68000
#define AREG0 "%a5" #define AREG0 "%a5"
#define AREG1 "%a4" #define AREG1 "%a4"
#define AREG2 "%d7" #define AREG2 "%d7"
#define AREG3 "%d6" #define AREG3 "%d6"
#define AREG4 "%d5" #define AREG4 "%d5"
#endif #elif defined(__ia64__)
#ifdef __ia64__
#define AREG0 "r7" #define AREG0 "r7"
#define AREG1 "r4" #define AREG1 "r4"
#define AREG2 "r5" #define AREG2 "r5"
#define AREG3 "r6" #define AREG3 "r6"
#else
#error unsupported CPU
#endif #endif
/* force GCC to generate only one epilog at the end of the function */ /* force GCC to generate only one epilog at the end of the function */
@ -250,44 +243,37 @@ extern int __op_jmp0, __op_jmp1, __op_jmp2, __op_jmp3;
#define ASM_NAME(x) #x #define ASM_NAME(x) #x
#endif #endif
#ifdef __i386__ #if defined(__i386__)
#define EXIT_TB() asm volatile ("ret") #define EXIT_TB() asm volatile ("ret")
#define GOTO_LABEL_PARAM(n) asm volatile ("jmp " ASM_NAME(__op_gen_label) #n) #define GOTO_LABEL_PARAM(n) asm volatile ("jmp " ASM_NAME(__op_gen_label) #n)
#endif #elif defined(__x86_64__)
#ifdef __x86_64__
#define EXIT_TB() asm volatile ("ret") #define EXIT_TB() asm volatile ("ret")
#define GOTO_LABEL_PARAM(n) asm volatile ("jmp " ASM_NAME(__op_gen_label) #n) #define GOTO_LABEL_PARAM(n) asm volatile ("jmp " ASM_NAME(__op_gen_label) #n)
#endif #elif defined(__powerpc__)
#ifdef __powerpc__
#define EXIT_TB() asm volatile ("blr") #define EXIT_TB() asm volatile ("blr")
#define GOTO_LABEL_PARAM(n) asm volatile ("b " ASM_NAME(__op_gen_label) #n) #define GOTO_LABEL_PARAM(n) asm volatile ("b " ASM_NAME(__op_gen_label) #n)
#endif #elif defined(__s390__)
#ifdef __s390__
#define EXIT_TB() asm volatile ("br %r14") #define EXIT_TB() asm volatile ("br %r14")
#define GOTO_LABEL_PARAM(n) asm volatile ("b " ASM_NAME(__op_gen_label) #n) #define GOTO_LABEL_PARAM(n) asm volatile ("b " ASM_NAME(__op_gen_label) #n)
#endif #elif defined(__alpha__)
#ifdef __alpha__
#define EXIT_TB() asm volatile ("ret") #define EXIT_TB() asm volatile ("ret")
#endif #elif defined(__ia64__)
#ifdef __ia64__
#define EXIT_TB() asm volatile ("br.ret.sptk.many b0;;") #define EXIT_TB() asm volatile ("br.ret.sptk.many b0;;")
#define GOTO_LABEL_PARAM(n) asm volatile ("br.sptk.many " \ #define GOTO_LABEL_PARAM(n) asm volatile ("br.sptk.many " \
ASM_NAME(__op_gen_label) #n) ASM_NAME(__op_gen_label) #n)
#endif #elif defined(__sparc__)
#ifdef __sparc__
#define EXIT_TB() asm volatile ("jmpl %i0 + 8, %g0; nop") #define EXIT_TB() asm volatile ("jmpl %i0 + 8, %g0; nop")
#define GOTO_LABEL_PARAM(n) asm volatile ("ba " ASM_NAME(__op_gen_label) #n ";nop") #define GOTO_LABEL_PARAM(n) asm volatile ("ba " ASM_NAME(__op_gen_label) #n ";nop")
#endif #elif defined(__arm__)
#ifdef __arm__
#define EXIT_TB() asm volatile ("b exec_loop") #define EXIT_TB() asm volatile ("b exec_loop")
#define GOTO_LABEL_PARAM(n) asm volatile ("b " ASM_NAME(__op_gen_label) #n) #define GOTO_LABEL_PARAM(n) asm volatile ("b " ASM_NAME(__op_gen_label) #n)
#endif #elif defined(__mc68000)
#ifdef __mc68000
#define EXIT_TB() asm volatile ("rts") #define EXIT_TB() asm volatile ("rts")
#endif #elif defined(__mips__)
#ifdef __mips__
#define EXIT_TB() asm volatile ("jr $ra") #define EXIT_TB() asm volatile ("jr $ra")
#define GOTO_LABEL_PARAM(n) asm volatile (".set noat; la $1, " ASM_NAME(__op_gen_label) #n "; jr $1; .set at") #define GOTO_LABEL_PARAM(n) asm volatile (".set noat; la $1, " ASM_NAME(__op_gen_label) #n "; jr $1; .set at")
#else
#error unsupported CPU
#endif #endif
#endif /* !defined(__DYNGEN_EXEC_H__) */ #endif /* !defined(__DYNGEN_EXEC_H__) */

59
dyngen.h
View File

@ -28,25 +28,11 @@ int __op_param1, __op_param2, __op_param3;
#endif #endif
int __op_jmp0, __op_jmp1, __op_jmp2, __op_jmp3; int __op_jmp0, __op_jmp1, __op_jmp2, __op_jmp3;
#ifdef __i386__ #if defined(__i386__) || defined(__x86_64__) || defined(__s390__)
static inline void flush_icache_range(unsigned long start, unsigned long stop) static inline void flush_icache_range(unsigned long start, unsigned long stop)
{ {
} }
#endif #elif defined(__ia64__)
#ifdef __x86_64__
static inline void flush_icache_range(unsigned long start, unsigned long stop)
{
}
#endif
#ifdef __s390__
static inline void flush_icache_range(unsigned long start, unsigned long stop)
{
}
#endif
#ifdef __ia64__
static inline void flush_icache_range(unsigned long start, unsigned long stop) static inline void flush_icache_range(unsigned long start, unsigned long stop)
{ {
while (start < stop) { while (start < stop) {
@ -55,9 +41,7 @@ static inline void flush_icache_range(unsigned long start, unsigned long stop)
} }
asm volatile (";;sync.i;;srlz.i;;"); asm volatile (";;sync.i;;srlz.i;;");
} }
#endif #elif defined(__powerpc__)
#ifdef __powerpc__
#define MIN_CACHE_LINE_SIZE 8 /* conservative value */ #define MIN_CACHE_LINE_SIZE 8 /* conservative value */
@ -78,17 +62,12 @@ static void inline flush_icache_range(unsigned long start, unsigned long stop)
asm volatile ("sync" : : : "memory"); asm volatile ("sync" : : : "memory");
asm volatile ("isync" : : : "memory"); asm volatile ("isync" : : : "memory");
} }
#endif #elif defined(__alpha__)
#ifdef __alpha__
static inline void flush_icache_range(unsigned long start, unsigned long stop) static inline void flush_icache_range(unsigned long start, unsigned long stop)
{ {
asm ("imb"); asm ("imb");
} }
#endif #elif defined(__sparc__)
#ifdef __sparc__
static void inline flush_icache_range(unsigned long start, unsigned long stop) static void inline flush_icache_range(unsigned long start, unsigned long stop)
{ {
unsigned long p; unsigned long p;
@ -99,10 +78,7 @@ static void inline flush_icache_range(unsigned long start, unsigned long stop)
for (; p < stop; p += 8) for (; p < stop; p += 8)
__asm__ __volatile__("flush\t%0" : : "r" (p)); __asm__ __volatile__("flush\t%0" : : "r" (p));
} }
#elif defined(__arm__)
#endif
#ifdef __arm__
static inline void flush_icache_range(unsigned long start, unsigned long stop) static inline void flush_icache_range(unsigned long start, unsigned long stop)
{ {
register unsigned long _beg __asm ("a1") = start; register unsigned long _beg __asm ("a1") = start;
@ -110,14 +86,22 @@ static inline void flush_icache_range(unsigned long start, unsigned long stop)
register unsigned long _flg __asm ("a3") = 0; register unsigned long _flg __asm ("a3") = 0;
__asm __volatile__ ("swi 0x9f0002" : : "r" (_beg), "r" (_end), "r" (_flg)); __asm __volatile__ ("swi 0x9f0002" : : "r" (_beg), "r" (_end), "r" (_flg));
} }
#endif #elif defined(__mc68000)
#ifdef __mc68000 # include <asm/cachectl.h>
#include <asm/cachectl.h>
static inline void flush_icache_range(unsigned long start, unsigned long stop) static inline void flush_icache_range(unsigned long start, unsigned long stop)
{ {
cacheflush(start,FLUSH_SCOPE_LINE,FLUSH_CACHE_BOTH,stop-start+16); cacheflush(start,FLUSH_SCOPE_LINE,FLUSH_CACHE_BOTH,stop-start+16);
} }
#elif defined(__mips__)
#include <sys/cachectl.h>
static inline void flush_icache_range(unsigned long start, unsigned long stop)
{
_flush_cache ((void *)start, stop - start, BCACHE);
}
#else
#error unsupported CPU
#endif #endif
#ifdef __alpha__ #ifdef __alpha__
@ -248,7 +232,6 @@ static uint8_t *arm_flush_ldr(uint8_t *gen_code_ptr,
#ifdef __ia64 #ifdef __ia64
/* Patch instruction with "val" where "mask" has 1 bits. */ /* Patch instruction with "val" where "mask" has 1 bits. */
static inline void ia64_patch (uint64_t insn_addr, uint64_t mask, uint64_t val) static inline void ia64_patch (uint64_t insn_addr, uint64_t mask, uint64_t val)
{ {
@ -463,11 +446,3 @@ static inline void ia64_apply_fixes (uint8_t **gen_code_pp,
} }
#endif #endif
#ifdef __mips__
#include <sys/cachectl.h>
static inline void flush_icache_range(unsigned long start, unsigned long stop)
{
_flush_cache ((void *)start, stop - start, BCACHE);
}
#endif