m48t59: Fix a wrong opaque passed to nvram read and write routines

This fixes boot on PPC prep.

Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Hervé Poussineau 2011-01-02 19:44:49 +01:00 committed by Aurelien Jarno
parent e2af15b2ad
commit 51f9b84e75

View File

@ -642,6 +642,7 @@ M48t59State *m48t59_init(qemu_irq IRQ, target_phys_addr_t mem_base,
DeviceState *dev; DeviceState *dev;
SysBusDevice *s; SysBusDevice *s;
M48t59SysBusState *d; M48t59SysBusState *d;
M48t59State *state;
dev = qdev_create(NULL, "m48t59"); dev = qdev_create(NULL, "m48t59");
qdev_prop_set_uint32(dev, "type", type); qdev_prop_set_uint32(dev, "type", type);
@ -649,18 +650,18 @@ M48t59State *m48t59_init(qemu_irq IRQ, target_phys_addr_t mem_base,
qdev_prop_set_uint32(dev, "io_base", io_base); qdev_prop_set_uint32(dev, "io_base", io_base);
qdev_init_nofail(dev); qdev_init_nofail(dev);
s = sysbus_from_qdev(dev); s = sysbus_from_qdev(dev);
d = FROM_SYSBUS(M48t59SysBusState, s);
state = &d->state;
sysbus_connect_irq(s, 0, IRQ); sysbus_connect_irq(s, 0, IRQ);
if (io_base != 0) { if (io_base != 0) {
register_ioport_read(io_base, 0x04, 1, NVRAM_readb, s); register_ioport_read(io_base, 0x04, 1, NVRAM_readb, state);
register_ioport_write(io_base, 0x04, 1, NVRAM_writeb, s); register_ioport_write(io_base, 0x04, 1, NVRAM_writeb, state);
} }
if (mem_base != 0) { if (mem_base != 0) {
sysbus_mmio_map(s, 0, mem_base); sysbus_mmio_map(s, 0, mem_base);
} }
d = FROM_SYSBUS(M48t59SysBusState, s); return state;
return &d->state;
} }
M48t59State *m48t59_init_isa(uint32_t io_base, uint16_t size, int type) M48t59State *m48t59_init_isa(uint32_t io_base, uint16_t size, int type)