trivial patches for 2016-09-15

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Merge remote-tracking branch 'remotes/mjt/tags/trivial-patches-fetch' into staging

trivial patches for 2016-09-15

# gpg: Signature made Thu 15 Sep 2016 13:40:55 BST
# gpg:                using RSA key 0x701B4F6B1A693E59
# gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>"
# gpg:                 aka "Michael Tokarev <mjt@corpit.ru>"
# gpg:                 aka "Michael Tokarev <mjt@debian.org>"
# Primary key fingerprint: 6EE1 95D1 886E 8FFB 810D  4324 457C E0A0 8044 65C5
#      Subkey fingerprint: 7B73 BAD6 8BE7 A2C2 8931  4B22 701B 4F6B 1A69 3E59

* remotes/mjt/tags/trivial-patches-fetch: (21 commits)
  mptsas: change .realize function name
  linux-user/qemu.h: change malloc to g_malloc, free to g_free
  win32: don't run subprocess tests on Mingw32 platform
  sheepdog: remove useless casts
  fw_cfg: remove useless casts
  tricore: remove useless cast
  s390x: remove useless cast
  linux-user,s390x: remove useless cast
  coccinelle: add a script to remove useless casts
  curl: Operate on zero-length file
  Remove unused function declarations
  ivshmem: Delete duplicate debug message
  sh4: fix broken link to documentation
  MAINTAINERS: Fix up F: entry bit rot
  MAINTAINERS: Add include/sysemu/cpus.h
  MAINTAINERS: Add include/hw/sh4/ to SH4 section
  MAINTAINERS: Add include/hw/tricore/ to TriCore section
  MAINTAINERS: Add include/hw/unicore32/ to UniCore32 section
  ui/console: Fix non-working backspace key in monitor of gtk UI
  tcg: Remove duplicate header includes
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2016-09-15 17:10:28 +01:00
commit 518352b601
53 changed files with 54 additions and 2961 deletions

View File

@ -83,6 +83,7 @@ F: include/exec/cpu*.h
F: include/exec/exec-all.h F: include/exec/exec-all.h
F: include/exec/helper*.h F: include/exec/helper*.h
F: include/exec/tb-hash.h F: include/exec/tb-hash.h
F: include/sysemu/cpus.h
FPU emulation FPU emulation
M: Aurelien Jarno <aurelien@aurel32.net> M: Aurelien Jarno <aurelien@aurel32.net>
@ -187,6 +188,7 @@ S: Odd Fixes
F: target-sh4/ F: target-sh4/
F: hw/sh4/ F: hw/sh4/
F: disas/sh4.c F: disas/sh4.c
F: include/hw/sh4/
SPARC SPARC
M: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> M: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
@ -202,6 +204,7 @@ M: Guan Xuetao <gxt@mprc.pku.edu.cn>
S: Maintained S: Maintained
F: target-unicore32/ F: target-unicore32/
F: hw/unicore32/ F: hw/unicore32/
F: include/hw/unicore32/
X86 X86
M: Paolo Bonzini <pbonzini@redhat.com> M: Paolo Bonzini <pbonzini@redhat.com>
@ -225,6 +228,7 @@ M: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
S: Maintained S: Maintained
F: target-tricore/ F: target-tricore/
F: hw/tricore/ F: hw/tricore/
F: include/hw/tricore/
Guest CPU Cores (KVM): Guest CPU Cores (KVM):
---------------------- ----------------------
@ -456,7 +460,6 @@ S: Maintained
F: hw/*/xilinx_* F: hw/*/xilinx_*
F: hw/*/cadence_* F: hw/*/cadence_*
F: hw/misc/zynq_slcr.c F: hw/misc/zynq_slcr.c
F: include/hw/xilinx.h
X: hw/ssi/xilinx_* X: hw/ssi/xilinx_*
Xilinx ZynqMP Xilinx ZynqMP
@ -465,7 +468,7 @@ M: Edgar E. Iglesias <edgar.iglesias@gmail.com>
L: qemu-arm@nongnu.org L: qemu-arm@nongnu.org
S: Maintained S: Maintained
F: hw/*/xlnx*.c F: hw/*/xlnx*.c
F: include/hw/*/xlnx*.c F: include/hw/*/xlnx*.h
ARM ACPI Subsystem ARM ACPI Subsystem
M: Shannon Zhao <zhaoshenglong@huawei.com> M: Shannon Zhao <zhaoshenglong@huawei.com>
@ -695,7 +698,7 @@ F: hw/i2c/smbus_ich9.c
F: hw/acpi/piix4.c F: hw/acpi/piix4.c
F: hw/acpi/ich9.c F: hw/acpi/ich9.c
F: include/hw/acpi/ich9.h F: include/hw/acpi/ich9.h
F: include/hw/acpi/piix.h F: include/hw/acpi/piix4.h
F: hw/misc/sga.c F: hw/misc/sga.c
PC Chipset PC Chipset
@ -801,10 +804,8 @@ F: hw/mem/*
F: hw/acpi/* F: hw/acpi/*
F: hw/smbios/* F: hw/smbios/*
F: hw/i386/acpi-build.[hc] F: hw/i386/acpi-build.[hc]
F: hw/i386/*dsl
F: hw/arm/virt-acpi-build.c F: hw/arm/virt-acpi-build.c
F: include/hw/arm/virt-acpi-build.h F: include/hw/arm/virt-acpi-build.h
F: scripts/acpi*py
ppc4xx ppc4xx
M: Alexander Graf <agraf@suse.de> M: Alexander Graf <agraf@suse.de>
@ -906,7 +907,6 @@ L: qemu-block@nongnu.org
S: Supported S: Supported
F: hw/block/virtio-blk.c F: hw/block/virtio-blk.c
F: hw/block/dataplane/* F: hw/block/dataplane/*
F: hw/virtio/dataplane/*
T: git git://github.com/stefanha/qemu.git block T: git git://github.com/stefanha/qemu.git block
virtio-ccw virtio-ccw
@ -1068,12 +1068,6 @@ S: Supported
F: qom/cpu.c F: qom/cpu.c
F: include/qom/cpu.h F: include/qom/cpu.h
ICC Bus
M: Igor Mammedov <imammedo@redhat.com>
S: Supported
F: include/hw/cpu/icc_bus.h
F: hw/cpu/icc_bus.c
Device Tree Device Tree
M: Peter Crosthwaite <crosthwaite.peter@gmail.com> M: Peter Crosthwaite <crosthwaite.peter@gmail.com>
M: Alexander Graf <agraf@suse.de> M: Alexander Graf <agraf@suse.de>
@ -1589,7 +1583,7 @@ M: Kevin Wolf <kwolf@redhat.com>
L: qemu-block@nongnu.org L: qemu-block@nongnu.org
S: Supported S: Supported
F: block/linux-aio.c F: block/linux-aio.c
F: block/raw-aio.h F: include/block/raw-aio.h
F: block/raw-posix.c F: block/raw-posix.c
F: block/raw-win32.c F: block/raw-win32.c
F: block/raw_bsd.c F: block/raw_bsd.c

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@ -675,11 +675,28 @@ static int curl_open(BlockDriverState *bs, QDict *options, int flags,
curl_easy_setopt(state->curl, CURLOPT_HEADERDATA, s); curl_easy_setopt(state->curl, CURLOPT_HEADERDATA, s);
if (curl_easy_perform(state->curl)) if (curl_easy_perform(state->curl))
goto out; goto out;
curl_easy_getinfo(state->curl, CURLINFO_CONTENT_LENGTH_DOWNLOAD, &d); if (curl_easy_getinfo(state->curl, CURLINFO_CONTENT_LENGTH_DOWNLOAD, &d)) {
if (d)
s->len = (size_t)d;
else if(!s->len)
goto out; goto out;
}
/* Prior CURL 7.19.4 return value of 0 could mean that the file size is not
* know or the size is zero. From 7.19.4 CURL returns -1 if size is not
* known and zero if it is realy zero-length file. */
#if LIBCURL_VERSION_NUM >= 0x071304
if (d < 0) {
pstrcpy(state->errmsg, CURL_ERROR_SIZE,
"Server didn't report file size.");
goto out;
}
#else
if (d <= 0) {
pstrcpy(state->errmsg, CURL_ERROR_SIZE,
"Unknown file size or zero-length file.");
goto out;
}
#endif
s->len = (size_t)d;
if ((!strncasecmp(s->url, "http://", strlen("http://")) if ((!strncasecmp(s->url, "http://", strlen("http://"))
|| !strncasecmp(s->url, "https://", strlen("https://"))) || !strncasecmp(s->url, "https://", strlen("https://")))
&& !s->accept_range) { && !s->accept_range) {

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@ -530,7 +530,6 @@ int qcow2_change_refcount_order(BlockDriverState *bs, int refcount_order,
int qcow2_grow_l1_table(BlockDriverState *bs, uint64_t min_size, int qcow2_grow_l1_table(BlockDriverState *bs, uint64_t min_size,
bool exact_size); bool exact_size);
int qcow2_write_l1_entry(BlockDriverState *bs, int l1_index); int qcow2_write_l1_entry(BlockDriverState *bs, int l1_index);
void qcow2_l2_cache_reset(BlockDriverState *bs);
int qcow2_decompress_cluster(BlockDriverState *bs, uint64_t cluster_offset); int qcow2_decompress_cluster(BlockDriverState *bs, uint64_t cluster_offset);
int qcow2_encrypt_sectors(BDRVQcow2State *s, int64_t sector_num, int qcow2_encrypt_sectors(BDRVQcow2State *s, int64_t sector_num,
uint8_t *out_buf, const uint8_t *in_buf, uint8_t *out_buf, const uint8_t *in_buf,

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@ -1049,7 +1049,7 @@ static int parse_vdiname(BDRVSheepdogState *s, const char *filename,
const char *host_spec, *vdi_spec; const char *host_spec, *vdi_spec;
int nr_sep, ret; int nr_sep, ret;
strstart(filename, "sheepdog:", (const char **)&filename); strstart(filename, "sheepdog:", &filename);
p = q = g_strdup(filename); p = q = g_strdup(filename);
/* count the number of separators */ /* count the number of separators */
@ -2652,7 +2652,7 @@ static int sd_snapshot_list(BlockDriverState *bs, QEMUSnapshotInfo **psn_tab)
req.opcode = SD_OP_READ_VDIS; req.opcode = SD_OP_READ_VDIS;
req.data_length = max; req.data_length = max;
ret = do_req(fd, s->aio_context, (SheepdogReq *)&req, ret = do_req(fd, s->aio_context, &req,
vdi_inuse, &wlen, &rlen); vdi_inuse, &wlen, &rlen);
closesocket(fd); closesocket(fd);

7
configure vendored
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@ -511,8 +511,6 @@ elif check_define __arm__ ; then
cpu="arm" cpu="arm"
elif check_define __aarch64__ ; then elif check_define __aarch64__ ; then
cpu="aarch64" cpu="aarch64"
elif check_define __hppa__ ; then
cpu="hppa"
else else
cpu=$(uname -m) cpu=$(uname -m)
fi fi
@ -3016,7 +3014,7 @@ fi
# g_test_trap_subprocess added in 2.38. Used by some tests. # g_test_trap_subprocess added in 2.38. Used by some tests.
glib_subprocess=yes glib_subprocess=yes
if ! $pkg_config --atleast-version=2.38 glib-2.0; then if test "$mingw32" = "yes" || ! $pkg_config --atleast-version=2.38 glib-2.0; then
glib_subprocess=no glib_subprocess=no
fi fi
@ -5899,9 +5897,6 @@ for i in $ARCH $TARGET_BASE_ARCH ; do
cris) cris)
disas_config "CRIS" disas_config "CRIS"
;; ;;
hppa)
disas_config "HPPA"
;;
i386|x86_64|x32) i386|x86_64|x32)
disas_config "I386" disas_config "I386"
;; ;;

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@ -310,8 +310,6 @@ void disas(FILE *out, void *code, unsigned long size)
print_insn = print_insn_m68k; print_insn = print_insn_m68k;
#elif defined(__s390__) #elif defined(__s390__)
print_insn = print_insn_s390; print_insn = print_insn_s390;
#elif defined(__hppa__)
print_insn = print_insn_hppa;
#elif defined(__ia64__) #elif defined(__ia64__)
print_insn = print_insn_ia64; print_insn = print_insn_ia64;
#endif #endif

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@ -9,7 +9,6 @@ libvixldir = $(SRC_PATH)/disas/libvixl
# versions do not. # versions do not.
arm-a64.o-cflags := -I$(libvixldir) -Wno-sign-compare arm-a64.o-cflags := -I$(libvixldir) -Wno-sign-compare
common-obj-$(CONFIG_CRIS_DIS) += cris.o common-obj-$(CONFIG_CRIS_DIS) += cris.o
common-obj-$(CONFIG_HPPA_DIS) += hppa.o
common-obj-$(CONFIG_I386_DIS) += i386.o common-obj-$(CONFIG_I386_DIS) += i386.o
common-obj-$(CONFIG_IA64_DIS) += ia64.o common-obj-$(CONFIG_IA64_DIS) += ia64.o
common-obj-$(CONFIG_M68K_DIS) += m68k.o common-obj-$(CONFIG_M68K_DIS) += m68k.o

File diff suppressed because it is too large Load Diff

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@ -264,12 +264,6 @@ sh_dsp_reg_nums;
be some confusion between DSP and FPU etc. */ be some confusion between DSP and FPU etc. */
#define SH_ARCH_UNKNOWN_ARCH 0xffffffff #define SH_ARCH_UNKNOWN_ARCH 0xffffffff
/* These are defined in bfd/cpu-sh.c . */
unsigned int sh_get_arch_from_bfd_mach (unsigned long mach);
unsigned int sh_get_arch_up_from_bfd_mach (unsigned long mach);
unsigned long sh_get_bfd_mach_from_arch_set (unsigned int arch_set);
/* bfd_boolean sh_merge_bfd_arch (bfd *ibfd, bfd *obfd); */
/* Below are the 'architecture sets'. /* Below are the 'architecture sets'.
They describe the following inheritance graph: They describe the following inheritance graph:

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@ -628,7 +628,6 @@ static void ivshmem_read(void *opaque, const uint8_t *buf, int size)
s->msg_buffered_bytes = 0; s->msg_buffered_bytes = 0;
fd = qemu_chr_fe_get_msgfd(s->server_chr); fd = qemu_chr_fe_get_msgfd(s->server_chr);
IVSHMEM_DPRINTF("posn is %" PRId64 ", fd is %d\n", msg, fd);
process_msg(s, msg, fd, &err); process_msg(s, msg, fd, &err);
if (err) { if (err) {

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@ -180,7 +180,7 @@ static void fw_cfg_bootsplash(FWCfgState *s)
temp = qemu_opt_get(opts, "splash-time"); temp = qemu_opt_get(opts, "splash-time");
if (temp != NULL) { if (temp != NULL) {
p = (char *)temp; p = (char *)temp;
boot_splash_time = strtol(p, (char **)&p, 10); boot_splash_time = strtol(p, &p, 10);
} }
} }
@ -240,7 +240,7 @@ static void fw_cfg_reboot(FWCfgState *s)
temp = qemu_opt_get(opts, "reboot-timeout"); temp = qemu_opt_get(opts, "reboot-timeout");
if (temp != NULL) { if (temp != NULL) {
p = (char *)temp; p = (char *)temp;
reboot_timeout = strtol(p, (char **)&p, 10); reboot_timeout = strtol(p, &p, 10);
} }
} }
/* validate the input */ /* validate the input */

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@ -71,11 +71,5 @@ CPUPPCState *ppc405ep_init(MemoryRegion *address_space_mem,
hwaddr ram_sizes[2], hwaddr ram_sizes[2],
uint32_t sysclk, qemu_irq **picp, uint32_t sysclk, qemu_irq **picp,
int do_init); int do_init);
/* IBM STBxxx microcontrollers */
CPUPPCState *ppc_stb025_init (MemoryRegion ram_memories[2],
hwaddr ram_bases[2],
hwaddr ram_sizes[2],
uint32_t sysclk, qemu_irq **picp,
ram_addr_t *offsetp);
#endif /* PPC405_H */ #endif /* PPC405_H */

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@ -426,7 +426,7 @@ int sclp_service_call(CPUS390XState *env, uint64_t sccb, uint32_t code)
goto out; goto out;
} }
sclp_c->execute(sclp, (SCCB *)&work_sccb, code); sclp_c->execute(sclp, &work_sccb, code);
cpu_physical_memory_write(sccb, &work_sccb, cpu_physical_memory_write(sccb, &work_sccb,
be16_to_cpu(work_sccb.h.length)); be16_to_cpu(work_sccb.h.length));

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@ -183,7 +183,6 @@ typedef struct VirtIORNGCcw {
VirtIORNG vdev; VirtIORNG vdev;
} VirtIORNGCcw; } VirtIORNGCcw;
void virtio_ccw_device_update_status(SubchDev *sch);
VirtIODevice *virtio_ccw_get_vdev(SubchDev *sch); VirtIODevice *virtio_ccw_get_vdev(SubchDev *sch);
#ifdef CONFIG_VIRTFS #ifdef CONFIG_VIRTFS

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@ -1269,7 +1269,7 @@ static const struct SCSIBusInfo mptsas_scsi_info = {
.load_request = mptsas_load_request, .load_request = mptsas_load_request,
}; };
static void mptsas_scsi_init(PCIDevice *dev, Error **errp) static void mptsas_scsi_realize(PCIDevice *dev, Error **errp)
{ {
DeviceState *d = DEVICE(dev); DeviceState *d = DEVICE(dev);
MPTSASState *s = MPT_SAS(dev); MPTSASState *s = MPT_SAS(dev);
@ -1426,7 +1426,7 @@ static void mptsas1068_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc); DeviceClass *dc = DEVICE_CLASS(oc);
PCIDeviceClass *pc = PCI_DEVICE_CLASS(oc); PCIDeviceClass *pc = PCI_DEVICE_CLASS(oc);
pc->realize = mptsas_scsi_init; pc->realize = mptsas_scsi_realize;
pc->exit = mptsas_scsi_uninit; pc->exit = mptsas_scsi_uninit;
pc->romfile = 0; pc->romfile = 0;
pc->vendor_id = PCI_VENDOR_ID_LSI_LOGIC; pc->vendor_id = PCI_VENDOR_ID_LSI_LOGIC;

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@ -23,7 +23,7 @@
*/ */
/* /*
Shix 2.0 board by Alexis Polti, described at Shix 2.0 board by Alexis Polti, described at
http://perso.enst.fr/~polti/realisations/shix20/ https://web.archive.org/web/20070917001736/perso.enst.fr/~polti/realisations/shix20
More information in target-sh4/README.sh4 More information in target-sh4/README.sh4
*/ */

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@ -46,7 +46,7 @@ static void tricore_load_kernel(CPUTriCoreState *env)
long kernel_size; long kernel_size;
kernel_size = load_elf(tricoretb_binfo.kernel_filename, NULL, kernel_size = load_elf(tricoretb_binfo.kernel_filename, NULL,
NULL, (uint64_t *)&entry, NULL, NULL, &entry, NULL,
NULL, 0, NULL, 0,
EM_TRICORE, 1, 0); EM_TRICORE, 1, 0);
if (kernel_size <= 0) { if (kernel_size <= 0) {

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@ -185,11 +185,6 @@ typedef enum BlockOpType {
BLOCK_OP_TYPE_MAX, BLOCK_OP_TYPE_MAX,
} BlockOpType; } BlockOpType;
void bdrv_info_print(Monitor *mon, const QObject *data);
void bdrv_info(Monitor *mon, QObject **ret_data);
void bdrv_stats_print(Monitor *mon, const QObject *data);
void bdrv_info_stats(Monitor *mon, QObject **ret_data);
/* disk I/O throttling */ /* disk I/O throttling */
void bdrv_init(void); void bdrv_init(void);
void bdrv_init_with_whitelist(void); void bdrv_init_with_whitelist(void);
@ -393,7 +388,6 @@ bool bdrv_is_encrypted(BlockDriverState *bs);
bool bdrv_key_required(BlockDriverState *bs); bool bdrv_key_required(BlockDriverState *bs);
int bdrv_set_key(BlockDriverState *bs, const char *key); int bdrv_set_key(BlockDriverState *bs, const char *key);
void bdrv_add_key(BlockDriverState *bs, const char *key, Error **errp); void bdrv_add_key(BlockDriverState *bs, const char *key, Error **errp);
int bdrv_query_missing_keys(void);
void bdrv_iterate_format(void (*it)(void *opaque, const char *name), void bdrv_iterate_format(void (*it)(void *opaque, const char *name),
void *opaque); void *opaque);
const char *bdrv_get_node_name(const BlockDriverState *bs); const char *bdrv_get_node_name(const BlockDriverState *bs);

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@ -562,15 +562,6 @@ extern BlockDriver bdrv_file;
extern BlockDriver bdrv_raw; extern BlockDriver bdrv_raw;
extern BlockDriver bdrv_qcow2; extern BlockDriver bdrv_qcow2;
/**
* bdrv_setup_io_funcs:
*
* Prepare a #BlockDriver for I/O request processing by populating
* unimplemented coroutine and AIO interfaces with generic wrapper functions
* that fall back to implemented interfaces.
*/
void bdrv_setup_io_funcs(BlockDriver *bdrv);
int coroutine_fn bdrv_co_preadv(BdrvChild *child, int coroutine_fn bdrv_co_preadv(BdrvChild *child,
int64_t offset, unsigned int bytes, QEMUIOVector *qiov, int64_t offset, unsigned int bytes, QEMUIOVector *qiov,
BdrvRequestFlags flags); BdrvRequestFlags flags);

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@ -83,7 +83,6 @@ typedef struct PXA2xxLCDState PXA2xxLCDState;
PXA2xxLCDState *pxa2xx_lcdc_init(MemoryRegion *sysmem, PXA2xxLCDState *pxa2xx_lcdc_init(MemoryRegion *sysmem,
hwaddr base, qemu_irq irq); hwaddr base, qemu_irq irq);
void pxa2xx_lcd_vsync_notifier(PXA2xxLCDState *s, qemu_irq handler); void pxa2xx_lcd_vsync_notifier(PXA2xxLCDState *s, qemu_irq handler);
void pxa2xx_lcdc_oritentation(void *opaque, int angle);
/* pxa2xx_mmci.c */ /* pxa2xx_mmci.c */
typedef struct PXA2xxMMCIState PXA2xxMMCIState; typedef struct PXA2xxMMCIState PXA2xxMMCIState;

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@ -174,8 +174,6 @@ enum bt_l2cap_psm_predef {
void bt_l2cap_sdp_init(struct bt_l2cap_device_s *dev); void bt_l2cap_sdp_init(struct bt_l2cap_device_s *dev);
/* bt-hid.c */ /* bt-hid.c */
struct bt_device_s *bt_mouse_init(struct bt_scatternet_s *net);
struct bt_device_s *bt_tablet_init(struct bt_scatternet_s *net);
struct bt_device_s *bt_keyboard_init(struct bt_scatternet_s *net); struct bt_device_s *bt_keyboard_init(struct bt_scatternet_s *net);
/* Link Management Protocol layer defines */ /* Link Management Protocol layer defines */

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@ -216,7 +216,6 @@ void vmmouse_set_data(const uint32_t *data);
/* pckbd.c */ /* pckbd.c */
#define I8042_A20_LINE "a20" #define I8042_A20_LINE "a20"
void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
MemoryRegion *region, ram_addr_t size, MemoryRegion *region, ram_addr_t size,
hwaddr mask); hwaddr mask);
@ -284,7 +283,6 @@ int cmos_get_fd_drive_type(FloppyDriveType fd0);
I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
qemu_irq sci_irq, qemu_irq smi_irq, qemu_irq sci_irq, qemu_irq smi_irq,
int smm_enabled, DeviceState **piix4_pm); int smm_enabled, DeviceState **piix4_pm);
void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
/* hpet.c */ /* hpet.c */
extern int no_hpet; extern int no_hpet;

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@ -106,8 +106,6 @@ int spapr_populate_pci_dt(sPAPRPHBState *phb,
uint32_t xics_phandle, uint32_t xics_phandle,
void *fdt); void *fdt);
void spapr_pci_msi_init(sPAPRMachineState *spapr, hwaddr addr);
void spapr_pci_rtas_init(void); void spapr_pci_rtas_init(void);
sPAPRPHBState *spapr_pci_find_phb(sPAPRMachineState *spapr, uint64_t buid); sPAPRPHBState *spapr_pci_find_phb(sPAPRMachineState *spapr, uint64_t buid);

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@ -45,7 +45,6 @@ void pci_bridge_update_mappings(PCIBridge *br);
void pci_bridge_write_config(PCIDevice *d, void pci_bridge_write_config(PCIDevice *d,
uint32_t address, uint32_t val, int len); uint32_t address, uint32_t val, int len);
void pci_bridge_disable_base_limit(PCIDevice *dev); void pci_bridge_disable_base_limit(PCIDevice *dev);
void pci_bridge_reset_reg(PCIDevice *dev);
void pci_bridge_reset(DeviceState *qdev); void pci_bridge_reset(DeviceState *qdev);
void pci_bridge_initfn(PCIDevice *pci_dev, const char *typename); void pci_bridge_initfn(PCIDevice *pci_dev, const char *typename);

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@ -53,7 +53,6 @@ struct PCIESlot {
}; };
void pcie_chassis_create(uint8_t chassis_number); void pcie_chassis_create(uint8_t chassis_number);
void pcie_main_chassis_create(void);
PCIESlot *pcie_chassis_find_slot(uint8_t chassis, uint16_t slot); PCIESlot *pcie_chassis_find_slot(uint8_t chassis, uint16_t slot);
int pcie_chassis_add_slot(struct PCIESlot *slot); int pcie_chassis_add_slot(struct PCIESlot *slot);
void pcie_chassis_del_slot(PCIESlot *s); void pcie_chassis_del_slot(PCIESlot *s);

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@ -55,10 +55,4 @@ void ppc4xx_sdram_init (CPUPPCState *env, qemu_irq irq, int nbanks,
#define TYPE_PPC4xx_PCI_HOST_BRIDGE "ppc4xx-pcihost" #define TYPE_PPC4xx_PCI_HOST_BRIDGE "ppc4xx-pcihost"
PCIBus *ppc4xx_pci_init(CPUPPCState *env, qemu_irq pci_irqs[4],
hwaddr config_space,
hwaddr int_ack,
hwaddr special_cycle,
hwaddr registers);
#endif /* PPC4XX_H */ #endif /* PPC4XX_H */

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@ -368,9 +368,6 @@ void spapr_register_hypercall(target_ulong opcode, spapr_hcall_fn fn);
target_ulong spapr_hypercall(PowerPCCPU *cpu, target_ulong opcode, target_ulong spapr_hypercall(PowerPCCPU *cpu, target_ulong opcode,
target_ulong *args); target_ulong *args);
int spapr_allocate_irq(int hint, bool lsi);
int spapr_allocate_irq_block(int num, bool lsi, bool msi);
/* ibm,set-eeh-option */ /* ibm,set-eeh-option */
#define RTAS_EEH_DISABLE 0 #define RTAS_EEH_DISABLE 0
#define RTAS_EEH_ENABLE 1 #define RTAS_EEH_ENABLE 1

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@ -85,8 +85,6 @@ extern VIOsPAPRDevice *spapr_vio_find_by_reg(VIOsPAPRBus *bus, uint32_t reg);
extern int spapr_populate_vdevice(VIOsPAPRBus *bus, void *fdt); extern int spapr_populate_vdevice(VIOsPAPRBus *bus, void *fdt);
extern int spapr_populate_chosen_stdout(void *fdt, VIOsPAPRBus *bus); extern int spapr_populate_chosen_stdout(void *fdt, VIOsPAPRBus *bus);
extern int spapr_vio_signal(VIOsPAPRDevice *dev, target_ulong mode);
static inline qemu_irq spapr_vio_qirq(VIOsPAPRDevice *dev) static inline qemu_irq spapr_vio_qirq(VIOsPAPRDevice *dev)
{ {
sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine()); sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
@ -137,8 +135,6 @@ void spapr_vscsi_create(VIOsPAPRBus *bus);
VIOsPAPRDevice *spapr_vty_get_default(VIOsPAPRBus *bus); VIOsPAPRDevice *spapr_vty_get_default(VIOsPAPRBus *bus);
void spapr_vio_quiesce(void);
extern const VMStateDescription vmstate_spapr_vio; extern const VMStateDescription vmstate_spapr_vio;
#define VMSTATE_SPAPR_VIO(_f, _s) \ #define VMSTATE_SPAPR_VIO(_f, _s) \

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@ -243,7 +243,6 @@ extern const struct SCSISense sense_code_SPACE_ALLOC_FAILED;
uint32_t scsi_data_cdb_xfer(uint8_t *buf); uint32_t scsi_data_cdb_xfer(uint8_t *buf);
uint32_t scsi_cdb_xfer(uint8_t *buf); uint32_t scsi_cdb_xfer(uint8_t *buf);
int scsi_cdb_length(uint8_t *buf); int scsi_cdb_length(uint8_t *buf);
int scsi_sense_valid(SCSISense sense);
int scsi_build_sense(uint8_t *in_buf, int in_len, int scsi_build_sense(uint8_t *in_buf, int in_len,
uint8_t *buf, int len, bool fixed); uint8_t *buf, int len, bool fixed);

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@ -111,9 +111,6 @@ void virtio_bus_device_unplugged(VirtIODevice *bus);
uint16_t virtio_bus_get_vdev_id(VirtioBusState *bus); uint16_t virtio_bus_get_vdev_id(VirtioBusState *bus);
/* Get the config_len field of the plugged device. */ /* Get the config_len field of the plugged device. */
size_t virtio_bus_get_vdev_config_len(VirtioBusState *bus); size_t virtio_bus_get_vdev_config_len(VirtioBusState *bus);
/* Get the features of the plugged device. */
uint32_t virtio_bus_get_vdev_features(VirtioBusState *bus,
uint32_t requested_features);
/* Get bad features of the plugged device. */ /* Get bad features of the plugged device. */
uint32_t virtio_bus_get_vdev_bad_features(VirtioBusState *bus); uint32_t virtio_bus_get_vdev_bad_features(VirtioBusState *bus);
/* Get config of the plugged device. */ /* Get config of the plugged device. */

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@ -229,8 +229,6 @@ void migrate_fd_error(MigrationState *s, const Error *error);
void migrate_fd_connect(MigrationState *s); void migrate_fd_connect(MigrationState *s);
int migrate_fd_close(MigrationState *s);
void add_migration_state_change_notifier(Notifier *notify); void add_migration_state_change_notifier(Notifier *notify);
void remove_migration_state_change_notifier(Notifier *notify); void remove_migration_state_change_notifier(Notifier *notify);
MigrationState *migrate_init(const MigrationParams *params); MigrationState *migrate_init(const MigrationParams *params);

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@ -138,8 +138,6 @@ NetClientState *qemu_get_queue(NICState *nic);
NICState *qemu_get_nic(NetClientState *nc); NICState *qemu_get_nic(NetClientState *nc);
void *qemu_get_nic_opaque(NetClientState *nc); void *qemu_get_nic_opaque(NetClientState *nc);
void qemu_del_net_client(NetClientState *nc); void qemu_del_net_client(NetClientState *nc);
NetClientState *qemu_find_vlan_client_by_name(Monitor *mon, int vlan_id,
const char *client_str);
typedef void (*qemu_nic_foreach)(NICState *nic, void *opaque); typedef void (*qemu_nic_foreach)(NICState *nic, void *opaque);
void qemu_foreach_nic(qemu_nic_foreach func, void *opaque); void qemu_foreach_nic(qemu_nic_foreach func, void *opaque);
int qemu_can_send_packet(NetClientState *nc); int qemu_can_send_packet(NetClientState *nc);

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@ -75,10 +75,6 @@ int slow_bitmap_equal(const unsigned long *bitmap1,
const unsigned long *bitmap2, long bits); const unsigned long *bitmap2, long bits);
void slow_bitmap_complement(unsigned long *dst, const unsigned long *src, void slow_bitmap_complement(unsigned long *dst, const unsigned long *src,
long bits); long bits);
void slow_bitmap_shift_right(unsigned long *dst,
const unsigned long *src, int shift, long bits);
void slow_bitmap_shift_left(unsigned long *dst,
const unsigned long *src, int shift, long bits);
int slow_bitmap_and(unsigned long *dst, const unsigned long *bitmap1, int slow_bitmap_and(unsigned long *dst, const unsigned long *bitmap1,
const unsigned long *bitmap2, long bits); const unsigned long *bitmap2, long bits);
void slow_bitmap_or(unsigned long *dst, const unsigned long *bitmap1, void slow_bitmap_or(unsigned long *dst, const unsigned long *bitmap1,

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@ -102,8 +102,6 @@ typedef struct QueryParams {
} QueryParams; } QueryParams;
struct QueryParams *query_params_new (int init_alloc); struct QueryParams *query_params_new (int init_alloc);
int query_param_append (QueryParams *ps, const char *name, const char *value);
extern char *query_param_to_string (const QueryParams *ps);
extern QueryParams *query_params_parse (const char *query); extern QueryParams *query_params_parse (const char *query);
extern void query_params_free (QueryParams *ps); extern void query_params_free (QueryParams *ps);

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@ -326,8 +326,6 @@ MemTxAttrs kvm_arch_post_run(CPUState *cpu, struct kvm_run *run);
int kvm_arch_handle_exit(CPUState *cpu, struct kvm_run *run); int kvm_arch_handle_exit(CPUState *cpu, struct kvm_run *run);
int kvm_arch_handle_ioapic_eoi(CPUState *cpu, struct kvm_run *run);
int kvm_arch_process_async_events(CPUState *cpu); int kvm_arch_process_async_events(CPUState *cpu);
int kvm_arch_get_registers(CPUState *cpu); int kvm_arch_get_registers(CPUState *cpu);

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@ -394,9 +394,7 @@ QemuUIInfo *qemu_console_get_ui_info(QemuConsole *con);
int qemu_console_get_width(QemuConsole *con, int fallback); int qemu_console_get_width(QemuConsole *con, int fallback);
int qemu_console_get_height(QemuConsole *con, int fallback); int qemu_console_get_height(QemuConsole *con, int fallback);
void text_consoles_set_display(DisplayState *ds);
void console_select(unsigned int index); void console_select(unsigned int index);
void console_color_init(DisplayState *ds);
void qemu_console_resize(QemuConsole *con, int width, int height); void qemu_console_resize(QemuConsole *con, int width, int height);
void qemu_console_copy(QemuConsole *con, int src_x, int src_y, void qemu_console_copy(QemuConsole *con, int src_x, int src_y,
int dst_x, int dst_y, int w, int h); int dst_x, int dst_y, int w, int h);

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@ -65,6 +65,4 @@ void qemu_input_check_mode_change(void);
void qemu_add_mouse_mode_change_notifier(Notifier *notify); void qemu_add_mouse_mode_change_notifier(Notifier *notify);
void qemu_remove_mouse_mode_change_notifier(Notifier *notify); void qemu_remove_mouse_mode_change_notifier(Notifier *notify);
int input_linux_init(void *opaque, QemuOpts *opts, Error **errp);
#endif /* INPUT_H */ #endif /* INPUT_H */

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@ -144,8 +144,6 @@ void qemu_spice_destroy_update(SimpleSpiceDisplay *sdpy, SimpleSpiceUpdate *upda
void qemu_spice_create_host_memslot(SimpleSpiceDisplay *ssd); void qemu_spice_create_host_memslot(SimpleSpiceDisplay *ssd);
void qemu_spice_create_host_primary(SimpleSpiceDisplay *ssd); void qemu_spice_create_host_primary(SimpleSpiceDisplay *ssd);
void qemu_spice_destroy_host_primary(SimpleSpiceDisplay *ssd); void qemu_spice_destroy_host_primary(SimpleSpiceDisplay *ssd);
void qemu_spice_vm_change_state_handler(void *opaque, int running,
RunState state);
void qemu_spice_display_init_common(SimpleSpiceDisplay *ssd); void qemu_spice_display_init_common(SimpleSpiceDisplay *ssd);
void qemu_spice_display_update(SimpleSpiceDisplay *ssd, void qemu_spice_display_update(SimpleSpiceDisplay *ssd,

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@ -548,7 +548,7 @@ static inline void *lock_user(int type, abi_ulong guest_addr, long len, int copy
#ifdef DEBUG_REMAP #ifdef DEBUG_REMAP
{ {
void *addr; void *addr;
addr = malloc(len); addr = g_malloc(len);
if (copy) if (copy)
memcpy(addr, g2h(guest_addr), len); memcpy(addr, g2h(guest_addr), len);
else else
@ -574,7 +574,7 @@ static inline void unlock_user(void *host_ptr, abi_ulong guest_addr,
return; return;
if (len > 0) if (len > 0)
memcpy(g2h(guest_addr), host_ptr, len); memcpy(g2h(guest_addr), host_ptr, len);
free(host_ptr); g_free(host_ptr);
#endif #endif
} }

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@ -4244,7 +4244,7 @@ static void setup_frame(int sig, struct target_sigaction *ka,
env->regs[5] = 0; // FIXME: no clue... current->thread.prot_addr; env->regs[5] = 0; // FIXME: no clue... current->thread.prot_addr;
/* Place signal number on stack to allow backtrace from handler. */ /* Place signal number on stack to allow backtrace from handler. */
__put_user(env->regs[2], (int *) &frame->signo); __put_user(env->regs[2], &frame->signo);
unlock_user_struct(frame, frame_addr, 1); unlock_user_struct(frame, frame_addr, 1);
return; return;

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@ -2329,8 +2329,8 @@ struct target_flock {
struct target_flock64 { struct target_flock64 {
short l_type; short l_type;
short l_whence; short l_whence;
#if defined(TARGET_PPC) || defined(TARGET_X86_64) || defined(TARGET_MIPS) \ #if defined(TARGET_PPC) || defined(TARGET_X86_64) \
|| defined(TARGET_SPARC) || defined(TARGET_HPPA) \ || defined(TARGET_MIPS) || defined(TARGET_SPARC) \
|| defined(TARGET_MICROBLAZE) || defined(TARGET_TILEGX) || defined(TARGET_MICROBLAZE) || defined(TARGET_TILEGX)
int __pad; int __pad;
#endif #endif

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@ -89,8 +89,7 @@ QEMU generic features:
@item @item
Working on x86, x86_64 and PowerPC32/64 hosts. Being tested on ARM, Working on x86, x86_64 and PowerPC32/64 hosts. Being tested on ARM,
HPPA, Sparc32 and Sparc64. Previous versions had some support for S390x, Sparc32 and Sparc64.
Alpha and S390 hosts, but TCG (see below) doesn't support those yet.
@item Self-modifying code support. @item Self-modifying code support.

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@ -0,0 +1,7 @@
// Remove useless casts
@@
type T;
T v;
@@
- (T *)&v
+ &v

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@ -474,7 +474,6 @@ int cpu_alpha_signal_handler(int host_signum, void *pinfo,
void *puc); void *puc);
int alpha_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int rw, int alpha_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int rw,
int mmu_idx); int mmu_idx);
void do_restore_state(CPUAlphaState *, uintptr_t retaddr);
void QEMU_NORETURN dynamic_excp(CPUAlphaState *, uintptr_t, int, int); void QEMU_NORETURN dynamic_excp(CPUAlphaState *, uintptr_t, int, int);
void QEMU_NORETURN arith_excp(CPUAlphaState *, uintptr_t, int, uint64_t); void QEMU_NORETURN arith_excp(CPUAlphaState *, uintptr_t, int, uint64_t);

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@ -196,7 +196,6 @@ enum {
#define MACSR_EV 0x001 #define MACSR_EV 0x001
void m68k_set_irq_level(M68kCPU *cpu, int level, uint8_t vector); void m68k_set_irq_level(M68kCPU *cpu, int level, uint8_t vector);
void m68k_set_macsr(CPUM68KState *env, uint32_t val);
void m68k_switch_sp(CPUM68KState *env); void m68k_switch_sp(CPUM68KState *env);
#define M68K_FPCR_PREC (1 << 6) #define M68K_FPCR_PREC (1 << 6)

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@ -1184,8 +1184,6 @@ void ppc_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
int flags); int flags);
void ppc_cpu_dump_statistics(CPUState *cpu, FILE *f, void ppc_cpu_dump_statistics(CPUState *cpu, FILE *f,
fprintf_function cpu_fprintf, int flags); fprintf_function cpu_fprintf, int flags);
int ppc_cpu_get_monitor_def(CPUState *cs, const char *name,
uint64_t *pval);
hwaddr ppc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); hwaddr ppc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
int ppc_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); int ppc_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
int ppc_cpu_gdb_read_register_apple(CPUState *cpu, uint8_t *buf, int reg); int ppc_cpu_gdb_read_register_apple(CPUState *cpu, uint8_t *buf, int reg);

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@ -4,7 +4,6 @@
#ifndef CONFIG_USER_ONLY #ifndef CONFIG_USER_ONLY
#ifdef TARGET_PPC64 #ifdef TARGET_PPC64
void ppc_hash64_check_page_sizes(PowerPCCPU *cpu, Error **errp);
void dump_slb(FILE *f, fprintf_function cpu_fprintf, PowerPCCPU *cpu); void dump_slb(FILE *f, fprintf_function cpu_fprintf, PowerPCCPU *cpu);
int ppc_store_slb(PowerPCCPU *cpu, target_ulong slot, int ppc_store_slb(PowerPCCPU *cpu, target_ulong slot,
target_ulong esid, target_ulong vsid); target_ulong esid, target_ulong vsid);

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@ -624,8 +624,6 @@ static inline unsigned int s390_cpu_set_state(uint8_t cpu_state, S390CPU *cpu)
return 0; return 0;
} }
#endif #endif
void cpu_lock(void);
void cpu_unlock(void);
extern void subsystem_reset(void); extern void subsystem_reset(void);

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@ -25,7 +25,7 @@ Goals
The primary model being worked on is the soft MMU target to be able to The primary model being worked on is the soft MMU target to be able to
emulate the Shix 2.0 board by Alexis Polti, described at emulate the Shix 2.0 board by Alexis Polti, described at
http://perso.enst.fr/~polti/realisations/shix20/ https://web.archive.org/web/20070917001736/http://perso.enst.fr/~polti/realisations/shix20/
Ultimately, qemu will be coupled with a system C or a verilog Ultimately, qemu will be coupled with a system C or a verilog
simulator to simulate the whole board functionalities. simulator to simulate the whole board functionalities.

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@ -40,8 +40,6 @@
#define NO_CPU_IO_DEFS #define NO_CPU_IO_DEFS
#include "cpu.h" #include "cpu.h"
#include "qemu/host-utils.h"
#include "qemu/timer.h"
#include "exec/cpu-common.h" #include "exec/cpu-common.h"
#include "exec/exec-all.h" #include "exec/exec-all.h"

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@ -723,7 +723,6 @@ static inline bool tcg_op_buf_full(void)
void *tcg_malloc_internal(TCGContext *s, int size); void *tcg_malloc_internal(TCGContext *s, int size);
void tcg_pool_reset(TCGContext *s); void tcg_pool_reset(TCGContext *s);
void tcg_pool_delete(TCGContext *s);
void tb_lock(void); void tb_lock(void);
void tb_unlock(void); void tb_unlock(void);
@ -907,7 +906,6 @@ void tcg_optimize(TCGContext *s);
/* only used for debugging purposes */ /* only used for debugging purposes */
void tcg_dump_ops(TCGContext *s); void tcg_dump_ops(TCGContext *s);
void dump_ops(const uint16_t *opc_buf, const TCGArg *opparam_buf);
TCGv_i32 tcg_const_i32(int32_t val); TCGv_i32 tcg_const_i32(int32_t val);
TCGv_i64 tcg_const_i64(int64_t val); TCGv_i64 tcg_const_i64(int64_t val);
TCGv_i32 tcg_const_local_i32(int32_t val); TCGv_i32 tcg_const_local_i32(int32_t val);

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@ -9,7 +9,7 @@ code fragments ("basic blocks") from target code (any of the
targets supported by QEMU) to a code representation which targets supported by QEMU) to a code representation which
can be run on a host. can be run on a host.
QEMU can create native code for some hosts (arm, hppa, i386, ia64, ppc, ppc64, QEMU can create native code for some hosts (arm, i386, ia64, ppc, ppc64,
s390, sparc, x86_64). For others, unofficial host support was written. s390, sparc, x86_64). For others, unofficial host support was written.
By adding a code generator for a virtual machine and using an By adding a code generator for a virtual machine and using an

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@ -1142,6 +1142,7 @@ static const int qcode_to_keysym[Q_KEY_CODE__MAX] = {
[Q_KEY_CODE_PGUP] = QEMU_KEY_PAGEUP, [Q_KEY_CODE_PGUP] = QEMU_KEY_PAGEUP,
[Q_KEY_CODE_PGDN] = QEMU_KEY_PAGEDOWN, [Q_KEY_CODE_PGDN] = QEMU_KEY_PAGEDOWN,
[Q_KEY_CODE_DELETE] = QEMU_KEY_DELETE, [Q_KEY_CODE_DELETE] = QEMU_KEY_DELETE,
[Q_KEY_CODE_BACKSPACE] = QEMU_KEY_BACKSPACE,
}; };
bool kbd_put_qcode_console(QemuConsole *s, int qcode) bool kbd_put_qcode_console(QemuConsole *s, int qcode)