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xilinx_axienet: pump events as appropriate

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When the conditions blocking receiving are cleared, check for buffered rx
packets.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
This commit is contained in:
Peter Crosthwaite 2013-04-03 14:04:09 +10:00 committed by Edgar E. Iglesias
parent bd4a47330e
commit 4dbb9ed326
1 changed files with 2 additions and 0 deletions
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2
hw/xilinx_axienet.c
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@ -516,6 +516,8 @@ static void enet_write(void *opaque, hwaddr addr,
s->rcw[addr & 1] = value; s->rcw[addr & 1] = value;
if ((addr & 1) && value & RCW1_RST) { if ((addr & 1) && value & RCW1_RST) {
axienet_rx_reset(s); axienet_rx_reset(s);
} else {
qemu_flush_queued_packets(qemu_get_queue(s->nic));
} }
break; break;