target/hppa: prevent trashing of temporary in trans_mtctl()
nullify_over() calls brcond which destroys all temporaries. Signed-off-by: Sven Schnelle <svens@stackframe.org> Message-Id: <20190913101714.29019-2-svens@stackframe.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -2214,10 +2214,11 @@ static bool trans_mtsp(DisasContext *ctx, arg_mtsp *a)
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static bool trans_mtctl(DisasContext *ctx, arg_mtctl *a)
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static bool trans_mtctl(DisasContext *ctx, arg_mtctl *a)
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{
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{
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unsigned ctl = a->t;
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unsigned ctl = a->t;
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TCGv_reg reg = load_gpr(ctx, a->r);
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TCGv_reg reg;
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TCGv_reg tmp;
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TCGv_reg tmp;
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if (ctl == CR_SAR) {
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if (ctl == CR_SAR) {
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reg = load_gpr(ctx, a->r);
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tmp = tcg_temp_new();
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tmp = tcg_temp_new();
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tcg_gen_andi_reg(tmp, reg, TARGET_REGISTER_BITS - 1);
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tcg_gen_andi_reg(tmp, reg, TARGET_REGISTER_BITS - 1);
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save_or_nullify(ctx, cpu_sar, tmp);
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save_or_nullify(ctx, cpu_sar, tmp);
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@ -2232,6 +2233,8 @@ static bool trans_mtctl(DisasContext *ctx, arg_mtctl *a)
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#ifndef CONFIG_USER_ONLY
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#ifndef CONFIG_USER_ONLY
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nullify_over(ctx);
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nullify_over(ctx);
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reg = load_gpr(ctx, a->r);
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switch (ctl) {
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switch (ctl) {
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case CR_IT:
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case CR_IT:
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gen_helper_write_interval_timer(cpu_env, reg);
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gen_helper_write_interval_timer(cpu_env, reg);
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