hw/intc/arm_gicv3_common: Move post_load hooks to top-level VMSD
Contrary to the the impression given in docs/devel/migration.rst, the migration code does not run the pre_load hook for a subsection unless the subsection appears on the wire, and so this is not a place where you can set the default value for state for the "subsection not present" case. Instead this needs to be done in a pre_load hook for whatever is the parent VMSD of the subsection. We got this wrong in two of the subsection definitions in the GICv3 migration structs; fix this. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Message-id: 20180806123445.1459-5-peter.maydell@linaro.org
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@ -73,7 +73,7 @@ static const VMStateDescription vmstate_gicv3_cpu_virt = {
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}
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}
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};
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};
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static int icc_sre_el1_reg_pre_load(void *opaque)
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static int vmstate_gicv3_cpu_pre_load(void *opaque)
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{
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{
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GICv3CPUState *cs = opaque;
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GICv3CPUState *cs = opaque;
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@ -97,7 +97,6 @@ const VMStateDescription vmstate_gicv3_cpu_sre_el1 = {
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.name = "arm_gicv3_cpu/sre_el1",
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.name = "arm_gicv3_cpu/sre_el1",
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.version_id = 1,
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.version_id = 1,
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.minimum_version_id = 1,
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.minimum_version_id = 1,
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.pre_load = icc_sre_el1_reg_pre_load,
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.needed = icc_sre_el1_reg_needed,
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.needed = icc_sre_el1_reg_needed,
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.fields = (VMStateField[]) {
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.fields = (VMStateField[]) {
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VMSTATE_UINT64(icc_sre_el1, GICv3CPUState),
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VMSTATE_UINT64(icc_sre_el1, GICv3CPUState),
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@ -109,6 +108,7 @@ static const VMStateDescription vmstate_gicv3_cpu = {
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.name = "arm_gicv3_cpu",
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.name = "arm_gicv3_cpu",
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.version_id = 1,
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.version_id = 1,
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.minimum_version_id = 1,
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.minimum_version_id = 1,
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.pre_load = vmstate_gicv3_cpu_pre_load,
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.fields = (VMStateField[]) {
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.fields = (VMStateField[]) {
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VMSTATE_UINT32(level, GICv3CPUState),
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VMSTATE_UINT32(level, GICv3CPUState),
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VMSTATE_UINT32(gicr_ctlr, GICv3CPUState),
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VMSTATE_UINT32(gicr_ctlr, GICv3CPUState),
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@ -139,7 +139,7 @@ static const VMStateDescription vmstate_gicv3_cpu = {
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}
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}
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};
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};
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static int gicv3_gicd_no_migration_shift_bug_pre_load(void *opaque)
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static int gicv3_pre_load(void *opaque)
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{
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{
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GICv3State *cs = opaque;
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GICv3State *cs = opaque;
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@ -210,7 +210,6 @@ const VMStateDescription vmstate_gicv3_gicd_no_migration_shift_bug = {
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.version_id = 1,
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.version_id = 1,
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.minimum_version_id = 1,
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.minimum_version_id = 1,
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.needed = needed_always,
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.needed = needed_always,
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.pre_load = gicv3_gicd_no_migration_shift_bug_pre_load,
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.post_load = gicv3_gicd_no_migration_shift_bug_post_load,
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.post_load = gicv3_gicd_no_migration_shift_bug_post_load,
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.fields = (VMStateField[]) {
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.fields = (VMStateField[]) {
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VMSTATE_BOOL(gicd_no_migration_shift_bug, GICv3State),
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VMSTATE_BOOL(gicd_no_migration_shift_bug, GICv3State),
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@ -222,6 +221,7 @@ static const VMStateDescription vmstate_gicv3 = {
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.name = "arm_gicv3",
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.name = "arm_gicv3",
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.version_id = 1,
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.version_id = 1,
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.minimum_version_id = 1,
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.minimum_version_id = 1,
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.pre_load = gicv3_pre_load,
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.pre_save = gicv3_pre_save,
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.pre_save = gicv3_pre_save,
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.post_load = gicv3_post_load,
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.post_load = gicv3_post_load,
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.priority = MIG_PRI_GICV3,
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.priority = MIG_PRI_GICV3,
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