David Venhoff cfcea9ee67 Initial commit
Based off b80915eb99
and compacted into a single commit so that it will fit on the uni git server
2025-08-11 13:05:09 +02:00

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* Central Interrupt Unit
Properties:
- compatible: "cavium,octeon-3860-ciu"
Compatibility with all cn3XXX, cn5XXX and cn63XX SOCs.
- interrupt-controller: This is an interrupt controller.
- reg: The base address of the CIU's register bank.
- #interrupt-cells: Must be <2>. The first cell is the bank within
the CIU and may have a value of 0 or 1. The second cell is the bit
within the bank and may have a value between 0 and 63.
Example:
interrupt-controller@1070000000000 {
compatible = "cavium,octeon-3860-ciu";
interrupt-controller;
/* Interrupts are specified by two parts:
* 1) Controller register (0 or 1)
* 2) Bit within the register (0..63)
*/
#interrupt-cells = <2>;
reg = <0x10700 0x00000000 0x0 0x7000>;
};