This converts existing DECLARE_INSTANCE_CHECKER usage to OBJECT_DECLARE_SIMPLE_TYPE when possible. $ ./scripts/codeconverter/converter.py -i \ --pattern=AddObjectDeclareSimpleType $(git grep -l '' -- '*.[ch]') Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Acked-by: Paul Durrant <paul@xen.org> Message-Id: <20200916182519.415636-6-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
		
			
				
	
	
		
			95 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			95 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * AVR 16-bit timer
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 *
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 * Copyright (c) 2018 University of Kent
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 * Author: Ed Robbins
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 *
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 * This library is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU Lesser General Public
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 * License as published by the Free Software Foundation; either
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 * version 2.1 of the License, or (at your option) any later version.
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 *
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 * This library is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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 * Lesser General Public License for more details.
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 *
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 * You should have received a copy of the GNU Lesser General Public
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 * License along with this library; if not, see
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 * <http://www.gnu.org/licenses/lgpl-2.1.html>
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 */
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/*
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 * Driver for 16 bit timers on 8 bit AVR devices.
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 * Note:
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 * On ATmega640/V-1280/V-1281/V-2560/V-2561/V timers 1, 3, 4 and 5 are 16 bit
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 */
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#ifndef HW_TIMER_AVR_TIMER16_H
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#define HW_TIMER_AVR_TIMER16_H
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#include "hw/sysbus.h"
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#include "qemu/timer.h"
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#include "hw/hw.h"
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#include "qom/object.h"
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enum NextInterrupt {
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    OVERFLOW,
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    COMPA,
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    COMPB,
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    COMPC,
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    CAPT
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};
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#define TYPE_AVR_TIMER16 "avr-timer16"
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OBJECT_DECLARE_SIMPLE_TYPE(AVRTimer16State, AVR_TIMER16)
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struct AVRTimer16State {
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    /* <private> */
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    SysBusDevice parent_obj;
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    /* <public> */
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    MemoryRegion iomem;
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    MemoryRegion imsk_iomem;
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    MemoryRegion ifr_iomem;
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    QEMUTimer *timer;
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    qemu_irq capt_irq;
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    qemu_irq compa_irq;
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    qemu_irq compb_irq;
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    qemu_irq compc_irq;
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    qemu_irq ovf_irq;
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    bool enabled;
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    /* registers */
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    uint8_t cra;
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    uint8_t crb;
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    uint8_t crc;
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    uint8_t cntl;
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    uint8_t cnth;
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    uint8_t icrl;
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    uint8_t icrh;
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    uint8_t ocral;
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    uint8_t ocrah;
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    uint8_t ocrbl;
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    uint8_t ocrbh;
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    uint8_t ocrcl;
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    uint8_t ocrch;
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    /*
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     * Reads and writes to CNT and ICR utilise a bizarre temporary
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     * register, which we emulate
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     */
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    uint8_t rtmp;
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    uint8_t imsk;
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    uint8_t ifr;
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    uint8_t id;
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    uint64_t cpu_freq_hz;
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    uint64_t freq_hz;
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    uint64_t period_ns;
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    uint64_t reset_time_ns;
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    enum NextInterrupt next_interrupt;
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};
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#endif /* HW_TIMER_AVR_TIMER16_H */
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