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Jiaxun Yang fd723105c1 target/mips: Add loongson-ext lswc2 group of instructions (Part 2) 
LWC2 & SWC2 have been rewritten by Loongson EXT vendor ASE
as "load/store quad word" and "shifted load/store" groups of
instructions.

This patch add implementation of these instructions:

  gslwlc1: similar to lwl but RT is FPR instead of GPR
  gslwrc1: similar to lwr but RT is FPR instead of GPR
  gsldlc1: similar to ldl but RT is FPR instead of GPR
  gsldrc1: similar to ldr but RT is FPR instead of GPR
  gsswlc1: similar to swl but RT is FPR instead of GPR
  gsswrc1: similar to swr but RT is FPR instead of GPR
  gssdlc1: similar to sdl but RT is FPR instead of GPR
  gssdrc1: similar to sdr but RT is FPR instead of GPR

Details of Loongson-EXT is here:
https://github.com/FlyGoat/loongson-insn/blob/master/loongson-ext.md

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Message-Id: <1602831120-3377-4-git-send-email-chenhc@lemote.com>
[PMD: Reuse t1 on MIPS32, reintroduce t2/fp0]
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-10-17 11:13:00 +02:00
..
cp0_helper.c
target/mips: Remove identical if/else branches
2020-07-14 21:49:33 +02:00
cp0_timer.c
target/mips: Style improvements in cp0_timer.c
2019-08-19 19:53:37 +02:00
cpu-param.h
target/mips: Support variable page size
2020-06-01 13:28:21 +02:00
cpu-qom.h
qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros
2020-09-18 14:12:32 -04:00
cpu.c
cpu: Use DeviceClass reset instead of a special CPUClass reset
2020-03-17 19:48:10 -04:00
cpu.h
target/mips: Add Loongson-3 CPU definition
2020-06-09 17:32:45 +02:00
dsp_helper.c
target/mips: Clean up dsp_helper.c
2019-06-01 20:20:20 +02:00
fpu_helper.c
target/mips: Demacro helpers for <MAX|MAXA|MIN|MINA>.<D|S>
2020-10-17 11:09:33 +02:00
gdbstub.c
gdbstub: extend GByteArray to read register helpers
2020-03-17 17:38:38 +00:00
helper.c
target/mips: Add implementation of GINVT instruction
2020-01-29 19:28:52 +01:00
helper.h
target/mips: msa: Split helpers for MULV.<B|H|W|D>
2020-06-15 20:51:04 +02:00
internal.h
target/mips: Fix some comment spelling errors
2020-10-17 11:08:42 +02:00
kvm_mips.h
hw/mips: Implement the kvm_type() hook in MachineClass
2020-06-27 19:35:39 +02:00
kvm.c
hw/mips: Implement the kvm_type() hook in MachineClass
2020-06-27 19:35:39 +02:00
lmmi_helper.c
target/mips: Add Loongson-3 CPU definition
2020-06-09 17:32:45 +02:00
machine.c
target/mips: Add more CP0 register for save/restore
2020-06-01 13:28:21 +02:00
meson.build
meson: target
2020-08-21 06:30:35 -04:00
mips-defs.h
target/mips: Add comments for vendor-specific ASEs
2020-06-15 20:33:16 +02:00
mips-semi.c
target/mips: semihosting: Remove 'uhi_done' label in helper_do_semihosting()
2020-01-29 19:28:52 +01:00
msa_helper.c
target/mips: msa: Split helpers for MULV.<B|H|W|D>
2020-06-15 20:51:04 +02:00
op_helper.c
target/mips: Separate FPU-related helpers into their own file
2020-02-04 08:53:54 +01:00
TODO
Move target-* CPU file into a target/ folder
2016-12-20 21:52:12 +01:00
trace-events
trace-events: Shorten file names in comments
2019-03-22 16:18:07 +00:00
trace.h
trace: switch position of headers to what Meson requires
2020-08-21 06:18:24 -04:00
translate_init.c.inc
target/mips: Fix some comment spelling errors
2020-10-17 11:08:42 +02:00
translate.c
target/mips: Add loongson-ext lswc2 group of instructions (Part 2)
2020-10-17 11:13:00 +02:00