A few headers neglect to include headers they need. They compile only if something else includes the required header(s) first. Fix that. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20221222104628.659681-3-armbru@redhat.com>
		
			
				
	
	
		
			64 lines
		
	
	
		
			1.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			64 lines
		
	
	
		
			1.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * QEMU PowerPC PowerNV Emulation of a few OCC related registers
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 *
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 * Copyright (c) 2015-2022, IBM Corporation.
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 *
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 * This library is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU Lesser General Public
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 * License as published by the Free Software Foundation; either
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 * version 2.1 of the License, or (at your option) any later version.
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 *
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 * This library is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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 * Lesser General Public License for more details.
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 *
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 * You should have received a copy of the GNU Lesser General Public
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 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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 */
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#ifndef PPC_PNV_OCC_H
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#define PPC_PNV_OCC_H
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#include "exec/memory.h"
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#include "hw/qdev-core.h"
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#define TYPE_PNV_OCC "pnv-occ"
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OBJECT_DECLARE_TYPE(PnvOCC, PnvOCCClass,
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                    PNV_OCC)
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#define TYPE_PNV8_OCC TYPE_PNV_OCC "-POWER8"
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DECLARE_INSTANCE_CHECKER(PnvOCC, PNV8_OCC,
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                         TYPE_PNV8_OCC)
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#define TYPE_PNV9_OCC TYPE_PNV_OCC "-POWER9"
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DECLARE_INSTANCE_CHECKER(PnvOCC, PNV9_OCC,
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                         TYPE_PNV9_OCC)
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#define TYPE_PNV10_OCC TYPE_PNV_OCC "-POWER10"
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DECLARE_INSTANCE_CHECKER(PnvOCC, PNV10_OCC, TYPE_PNV10_OCC)
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#define PNV_OCC_SENSOR_DATA_BLOCK_OFFSET 0x00580000
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#define PNV_OCC_SENSOR_DATA_BLOCK_SIZE   0x00025800
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struct PnvOCC {
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    DeviceState xd;
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    /* OCC Misc interrupt */
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    uint64_t occmisc;
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    qemu_irq psi_irq;
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    MemoryRegion xscom_regs;
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    MemoryRegion sram_regs;
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};
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struct PnvOCCClass {
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    DeviceClass parent_class;
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    int xscom_size;
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    const MemoryRegionOps *xscom_ops;
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};
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#define PNV_OCC_SENSOR_DATA_BLOCK_BASE(i)                               \
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    (PNV_OCC_SENSOR_DATA_BLOCK_OFFSET + (i) * PNV_OCC_SENSOR_DATA_BLOCK_SIZE)
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#endif /* PPC_PNV_OCC_H */
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