Add a bypass_iommu property for pci_expander_bridge, the property is used to indicate whether pxb root bus will bypass iommu. By default the bypass_iommu is disabled, and it can be enabled with: qemu -device pxb-pcie,bus_nr=0x10,addr=0x1,bypass_iommu=true Signed-off-by: Xingang Wang <wangxingang5@huawei.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-Id: <1625748919-52456-3-git-send-email-wangxingang5@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
		
			
				
	
	
		
			386 lines
		
	
	
		
			11 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			386 lines
		
	
	
		
			11 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * PCI Expander Bridge Device Emulation
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 *
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 * Copyright (C) 2015 Red Hat Inc
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 *
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 * Authors:
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 *   Marcel Apfelbaum <marcel@redhat.com>
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 *
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 * This work is licensed under the terms of the GNU GPL, version 2 or later.
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 * See the COPYING file in the top-level directory.
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 */
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "hw/pci/pci.h"
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#include "hw/pci/pci_bus.h"
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#include "hw/pci/pci_host.h"
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#include "hw/qdev-properties.h"
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#include "hw/pci/pci_bridge.h"
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#include "qemu/range.h"
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#include "qemu/error-report.h"
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#include "qemu/module.h"
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#include "sysemu/numa.h"
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#include "hw/boards.h"
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#include "qom/object.h"
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#define TYPE_PXB_BUS "pxb-bus"
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typedef struct PXBBus PXBBus;
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DECLARE_INSTANCE_CHECKER(PXBBus, PXB_BUS,
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                         TYPE_PXB_BUS)
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#define TYPE_PXB_PCIE_BUS "pxb-pcie-bus"
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DECLARE_INSTANCE_CHECKER(PXBBus, PXB_PCIE_BUS,
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                         TYPE_PXB_PCIE_BUS)
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struct PXBBus {
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    /*< private >*/
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    PCIBus parent_obj;
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    /*< public >*/
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    char bus_path[8];
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};
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#define TYPE_PXB_DEVICE "pxb"
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typedef struct PXBDev PXBDev;
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DECLARE_INSTANCE_CHECKER(PXBDev, PXB_DEV,
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                         TYPE_PXB_DEVICE)
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#define TYPE_PXB_PCIE_DEVICE "pxb-pcie"
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DECLARE_INSTANCE_CHECKER(PXBDev, PXB_PCIE_DEV,
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                         TYPE_PXB_PCIE_DEVICE)
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struct PXBDev {
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    /*< private >*/
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    PCIDevice parent_obj;
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    /*< public >*/
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    uint8_t bus_nr;
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    uint16_t numa_node;
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    bool bypass_iommu;
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};
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static PXBDev *convert_to_pxb(PCIDevice *dev)
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{
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    return pci_bus_is_express(pci_get_bus(dev))
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        ? PXB_PCIE_DEV(dev) : PXB_DEV(dev);
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}
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static GList *pxb_dev_list;
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#define TYPE_PXB_HOST "pxb-host"
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static int pxb_bus_num(PCIBus *bus)
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{
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    PXBDev *pxb = convert_to_pxb(bus->parent_dev);
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    return pxb->bus_nr;
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}
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static uint16_t pxb_bus_numa_node(PCIBus *bus)
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{
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    PXBDev *pxb = convert_to_pxb(bus->parent_dev);
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    return pxb->numa_node;
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}
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static void pxb_bus_class_init(ObjectClass *class, void *data)
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{
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    PCIBusClass *pbc = PCI_BUS_CLASS(class);
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    pbc->bus_num = pxb_bus_num;
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    pbc->numa_node = pxb_bus_numa_node;
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}
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static const TypeInfo pxb_bus_info = {
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    .name          = TYPE_PXB_BUS,
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    .parent        = TYPE_PCI_BUS,
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    .instance_size = sizeof(PXBBus),
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    .class_init    = pxb_bus_class_init,
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};
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static const TypeInfo pxb_pcie_bus_info = {
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    .name          = TYPE_PXB_PCIE_BUS,
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    .parent        = TYPE_PCIE_BUS,
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    .instance_size = sizeof(PXBBus),
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    .class_init    = pxb_bus_class_init,
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};
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static const char *pxb_host_root_bus_path(PCIHostState *host_bridge,
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                                          PCIBus *rootbus)
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{
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    PXBBus *bus = pci_bus_is_express(rootbus) ?
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                  PXB_PCIE_BUS(rootbus) : PXB_BUS(rootbus);
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    snprintf(bus->bus_path, 8, "0000:%02x", pxb_bus_num(rootbus));
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    return bus->bus_path;
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}
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static char *pxb_host_ofw_unit_address(const SysBusDevice *dev)
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{
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    const PCIHostState *pxb_host;
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    const PCIBus *pxb_bus;
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    const PXBDev *pxb_dev;
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    int position;
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    const DeviceState *pxb_dev_base;
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    const PCIHostState *main_host;
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    const SysBusDevice *main_host_sbd;
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    pxb_host = PCI_HOST_BRIDGE(dev);
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    pxb_bus = pxb_host->bus;
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    pxb_dev = convert_to_pxb(pxb_bus->parent_dev);
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    position = g_list_index(pxb_dev_list, pxb_dev);
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    assert(position >= 0);
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    pxb_dev_base = DEVICE(pxb_dev);
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    main_host = PCI_HOST_BRIDGE(pxb_dev_base->parent_bus->parent);
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    main_host_sbd = SYS_BUS_DEVICE(main_host);
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    if (main_host_sbd->num_mmio > 0) {
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        return g_strdup_printf(TARGET_FMT_plx ",%x",
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                               main_host_sbd->mmio[0].addr, position + 1);
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    }
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    if (main_host_sbd->num_pio > 0) {
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        return g_strdup_printf("i%04x,%x",
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                               main_host_sbd->pio[0], position + 1);
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    }
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    return NULL;
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}
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static void pxb_host_class_init(ObjectClass *class, void *data)
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{
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    DeviceClass *dc = DEVICE_CLASS(class);
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    SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(class);
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    PCIHostBridgeClass *hc = PCI_HOST_BRIDGE_CLASS(class);
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    dc->fw_name = "pci";
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    /* Reason: Internal part of the pxb/pxb-pcie device, not usable by itself */
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    dc->user_creatable = false;
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    sbc->explicit_ofw_unit_address = pxb_host_ofw_unit_address;
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    hc->root_bus_path = pxb_host_root_bus_path;
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}
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static const TypeInfo pxb_host_info = {
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    .name          = TYPE_PXB_HOST,
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    .parent        = TYPE_PCI_HOST_BRIDGE,
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    .class_init    = pxb_host_class_init,
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};
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/*
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 * Registers the PXB bus as a child of pci host root bus.
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 */
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static void pxb_register_bus(PCIDevice *dev, PCIBus *pxb_bus, Error **errp)
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{
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    PCIBus *bus = pci_get_bus(dev);
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    int pxb_bus_num = pci_bus_num(pxb_bus);
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    if (bus->parent_dev) {
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        error_setg(errp, "PXB devices can be attached only to root bus");
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        return;
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    }
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    QLIST_FOREACH(bus, &bus->child, sibling) {
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        if (pci_bus_num(bus) == pxb_bus_num) {
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            error_setg(errp, "Bus %d is already in use", pxb_bus_num);
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            return;
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        }
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    }
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    QLIST_INSERT_HEAD(&pci_get_bus(dev)->child, pxb_bus, sibling);
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}
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static int pxb_map_irq_fn(PCIDevice *pci_dev, int pin)
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{
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    PCIDevice *pxb = pci_get_bus(pci_dev)->parent_dev;
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    /*
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     * The bios does not index the pxb slot number when
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     * it computes the IRQ because it resides on bus 0
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     * and not on the current bus.
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     * However QEMU routes the irq through bus 0 and adds
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     * the pxb slot to the IRQ computation of the PXB
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     * device.
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     *
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     * Synchronize between bios and QEMU by canceling
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     * pxb's effect.
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     */
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    return pin - PCI_SLOT(pxb->devfn);
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}
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static gint pxb_compare(gconstpointer a, gconstpointer b)
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{
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    const PXBDev *pxb_a = a, *pxb_b = b;
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    return pxb_a->bus_nr < pxb_b->bus_nr ? -1 :
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           pxb_a->bus_nr > pxb_b->bus_nr ?  1 :
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           0;
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}
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static void pxb_dev_realize_common(PCIDevice *dev, bool pcie, Error **errp)
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{
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    PXBDev *pxb = convert_to_pxb(dev);
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    DeviceState *ds, *bds = NULL;
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    PCIBus *bus;
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    const char *dev_name = NULL;
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    Error *local_err = NULL;
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    MachineState *ms = MACHINE(qdev_get_machine());
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    if (ms->numa_state == NULL) {
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        error_setg(errp, "NUMA is not supported by this machine-type");
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        return;
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    }
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    if (pxb->numa_node != NUMA_NODE_UNASSIGNED &&
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        pxb->numa_node >= ms->numa_state->num_nodes) {
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        error_setg(errp, "Illegal numa node %d", pxb->numa_node);
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        return;
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    }
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    if (dev->qdev.id && *dev->qdev.id) {
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        dev_name = dev->qdev.id;
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    }
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    ds = qdev_new(TYPE_PXB_HOST);
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    if (pcie) {
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        bus = pci_root_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_PCIE_BUS);
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    } else {
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        bus = pci_root_bus_new(ds, "pxb-internal", NULL, NULL, 0, TYPE_PXB_BUS);
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        bds = qdev_new("pci-bridge");
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        bds->id = dev_name;
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        qdev_prop_set_uint8(bds, PCI_BRIDGE_DEV_PROP_CHASSIS_NR, pxb->bus_nr);
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        qdev_prop_set_bit(bds, PCI_BRIDGE_DEV_PROP_SHPC, false);
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    }
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    bus->parent_dev = dev;
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    bus->address_space_mem = pci_get_bus(dev)->address_space_mem;
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    bus->address_space_io = pci_get_bus(dev)->address_space_io;
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    bus->map_irq = pxb_map_irq_fn;
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    PCI_HOST_BRIDGE(ds)->bus = bus;
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    PCI_HOST_BRIDGE(ds)->bypass_iommu = pxb->bypass_iommu;
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    pxb_register_bus(dev, bus, &local_err);
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    if (local_err) {
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        error_propagate(errp, local_err);
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        goto err_register_bus;
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    }
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    sysbus_realize_and_unref(SYS_BUS_DEVICE(ds), &error_fatal);
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    if (bds) {
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        qdev_realize_and_unref(bds, &bus->qbus, &error_fatal);
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    }
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    pci_word_test_and_set_mask(dev->config + PCI_STATUS,
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                               PCI_STATUS_66MHZ | PCI_STATUS_FAST_BACK);
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    pci_config_set_class(dev->config, PCI_CLASS_BRIDGE_HOST);
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    pxb_dev_list = g_list_insert_sorted(pxb_dev_list, pxb, pxb_compare);
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    return;
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err_register_bus:
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    object_unref(OBJECT(bds));
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    object_unparent(OBJECT(bus));
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    object_unref(OBJECT(ds));
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}
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static void pxb_dev_realize(PCIDevice *dev, Error **errp)
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{
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    if (pci_bus_is_express(pci_get_bus(dev))) {
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        error_setg(errp, "pxb devices cannot reside on a PCIe bus");
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        return;
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    }
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    pxb_dev_realize_common(dev, false, errp);
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}
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static void pxb_dev_exitfn(PCIDevice *pci_dev)
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{
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    PXBDev *pxb = convert_to_pxb(pci_dev);
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    pxb_dev_list = g_list_remove(pxb_dev_list, pxb);
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}
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static Property pxb_dev_properties[] = {
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    /* Note: 0 is not a legal PXB bus number. */
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    DEFINE_PROP_UINT8("bus_nr", PXBDev, bus_nr, 0),
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    DEFINE_PROP_UINT16("numa_node", PXBDev, numa_node, NUMA_NODE_UNASSIGNED),
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    DEFINE_PROP_BOOL("bypass_iommu", PXBDev, bypass_iommu, false),
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    DEFINE_PROP_END_OF_LIST(),
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};
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static void pxb_dev_class_init(ObjectClass *klass, void *data)
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{
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    DeviceClass *dc = DEVICE_CLASS(klass);
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    PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
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    k->realize = pxb_dev_realize;
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    k->exit = pxb_dev_exitfn;
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    k->vendor_id = PCI_VENDOR_ID_REDHAT;
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    k->device_id = PCI_DEVICE_ID_REDHAT_PXB;
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    k->class_id = PCI_CLASS_BRIDGE_HOST;
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    dc->desc = "PCI Expander Bridge";
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    device_class_set_props(dc, pxb_dev_properties);
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    dc->hotpluggable = false;
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    set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
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}
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static const TypeInfo pxb_dev_info = {
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    .name          = TYPE_PXB_DEVICE,
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    .parent        = TYPE_PCI_DEVICE,
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    .instance_size = sizeof(PXBDev),
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    .class_init    = pxb_dev_class_init,
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    .interfaces = (InterfaceInfo[]) {
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        { INTERFACE_CONVENTIONAL_PCI_DEVICE },
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        { },
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    },
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};
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static void pxb_pcie_dev_realize(PCIDevice *dev, Error **errp)
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{
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    if (!pci_bus_is_express(pci_get_bus(dev))) {
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        error_setg(errp, "pxb-pcie devices cannot reside on a PCI bus");
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        return;
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    }
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    pxb_dev_realize_common(dev, true, errp);
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}
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static void pxb_pcie_dev_class_init(ObjectClass *klass, void *data)
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{
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    DeviceClass *dc = DEVICE_CLASS(klass);
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    PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
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    k->realize = pxb_pcie_dev_realize;
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    k->exit = pxb_dev_exitfn;
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    k->vendor_id = PCI_VENDOR_ID_REDHAT;
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    k->device_id = PCI_DEVICE_ID_REDHAT_PXB_PCIE;
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    k->class_id = PCI_CLASS_BRIDGE_HOST;
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    dc->desc = "PCI Express Expander Bridge";
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    device_class_set_props(dc, pxb_dev_properties);
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    dc->hotpluggable = false;
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    set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
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}
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static const TypeInfo pxb_pcie_dev_info = {
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    .name          = TYPE_PXB_PCIE_DEVICE,
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    .parent        = TYPE_PCI_DEVICE,
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    .instance_size = sizeof(PXBDev),
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    .class_init    = pxb_pcie_dev_class_init,
 | 
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    .interfaces = (InterfaceInfo[]) {
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        { INTERFACE_CONVENTIONAL_PCI_DEVICE },
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        { },
 | 
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    },
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};
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static void pxb_register_types(void)
 | 
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{
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    type_register_static(&pxb_bus_info);
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    type_register_static(&pxb_pcie_bus_info);
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    type_register_static(&pxb_host_info);
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    type_register_static(&pxb_dev_info);
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    type_register_static(&pxb_pcie_dev_info);
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}
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type_init(pxb_register_types)
 |