b71d0385e9
In the Allwinner H3 SoC the SDRAM controller is responsible for interfacing with the external Synchronous Dynamic Random Access Memory (SDRAM). Types of memory that the SDRAM controller supports are DDR2/DDR3 and capacities of up to 2GiB. This commit adds emulation support of the Allwinner H3 SDRAM controller. Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200311221854.30370-12-nieklinnenbank@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
131 lines
4.4 KiB
C
131 lines
4.4 KiB
C
/*
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* Orange Pi emulation
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*
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* Copyright (C) 2019 Niek Linnenbank <nieklinnenbank@gmail.com>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "qemu/units.h"
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#include "exec/address-spaces.h"
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#include "qapi/error.h"
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#include "cpu.h"
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#include "hw/sysbus.h"
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#include "hw/boards.h"
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#include "hw/qdev-properties.h"
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#include "hw/arm/allwinner-h3.h"
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#include "sysemu/sysemu.h"
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static struct arm_boot_info orangepi_binfo = {
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.nb_cpus = AW_H3_NUM_CPUS,
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};
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static void orangepi_init(MachineState *machine)
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{
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AwH3State *h3;
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DriveInfo *di;
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BlockBackend *blk;
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BusState *bus;
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DeviceState *carddev;
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/* BIOS is not supported by this board */
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if (bios_name) {
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error_report("BIOS not supported for this machine");
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exit(1);
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}
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/* This board has fixed size RAM */
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if (machine->ram_size != 1 * GiB) {
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error_report("This machine can only be used with 1GiB of RAM");
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exit(1);
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}
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/* Only allow Cortex-A7 for this board */
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if (strcmp(machine->cpu_type, ARM_CPU_TYPE_NAME("cortex-a7")) != 0) {
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error_report("This board can only be used with cortex-a7 CPU");
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exit(1);
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}
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h3 = AW_H3(object_new(TYPE_AW_H3));
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object_property_add_child(OBJECT(machine), "soc", OBJECT(h3),
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&error_abort);
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object_unref(OBJECT(h3));
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/* Setup timer properties */
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object_property_set_int(OBJECT(h3), 32768, "clk0-freq",
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&error_abort);
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object_property_set_int(OBJECT(h3), 24 * 1000 * 1000, "clk1-freq",
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&error_abort);
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/* Setup SID properties. Currently using a default fixed SID identifier. */
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if (qemu_uuid_is_null(&h3->sid.identifier)) {
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qdev_prop_set_string(DEVICE(h3), "identifier",
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"02c00081-1111-2222-3333-000044556677");
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} else if (ldl_be_p(&h3->sid.identifier.data[0]) != 0x02c00081) {
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warn_report("Security Identifier value does not include H3 prefix");
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}
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/* Setup EMAC properties */
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object_property_set_int(OBJECT(&h3->emac), 1, "phy-addr", &error_abort);
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/* DRAMC */
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object_property_set_uint(OBJECT(h3), h3->memmap[AW_H3_SDRAM],
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"ram-addr", &error_abort);
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object_property_set_int(OBJECT(h3), machine->ram_size / MiB, "ram-size",
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&error_abort);
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/* Mark H3 object realized */
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object_property_set_bool(OBJECT(h3), true, "realized", &error_abort);
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/* Retrieve SD bus */
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di = drive_get_next(IF_SD);
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blk = di ? blk_by_legacy_dinfo(di) : NULL;
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bus = qdev_get_child_bus(DEVICE(h3), "sd-bus");
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/* Plug in SD card */
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carddev = qdev_create(bus, TYPE_SD_CARD);
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qdev_prop_set_drive(carddev, "drive", blk, &error_fatal);
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object_property_set_bool(OBJECT(carddev), true, "realized", &error_fatal);
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/* SDRAM */
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memory_region_add_subregion(get_system_memory(), h3->memmap[AW_H3_SDRAM],
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machine->ram);
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/* Load target kernel or start using BootROM */
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if (!machine->kernel_filename && blk_is_available(blk)) {
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/* Use Boot ROM to copy data from SD card to SRAM */
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allwinner_h3_bootrom_setup(h3, blk);
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}
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orangepi_binfo.loader_start = h3->memmap[AW_H3_SDRAM];
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orangepi_binfo.ram_size = machine->ram_size;
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arm_load_kernel(ARM_CPU(first_cpu), machine, &orangepi_binfo);
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}
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static void orangepi_machine_init(MachineClass *mc)
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{
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mc->desc = "Orange Pi PC";
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mc->init = orangepi_init;
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mc->block_default_type = IF_SD;
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mc->units_per_default_bus = 1;
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mc->min_cpus = AW_H3_NUM_CPUS;
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mc->max_cpus = AW_H3_NUM_CPUS;
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mc->default_cpus = AW_H3_NUM_CPUS;
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mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a7");
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mc->default_ram_size = 1 * GiB;
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mc->default_ram_id = "orangepi.ram";
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}
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DEFINE_MACHINE("orangepi-pc", orangepi_machine_init)
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