 03ae4133ab
			
		
	
	
		03ae4133ab
		
	
	
	
	
		
			
			So far it was enough to have a base PVR value and mask per CPU family such as POWER7 or POWER8. However there CPUs which are completely architecturally compatible but have different PVRs such as POWER7/POWER7+ and POWER8/POWER8E. For these CPUs, top 16 bits are CPU family and low 16 bits are the version. The families have PVR base values different enough so defining a mask which would cover both (or potentially more) CPUs within the family is not possible. This adds a pvr_match() callback to PowerPCCPUClass. The default handler simply compares PVR defined in the class. This implements ppc_pvr_match_power7/ppc_pvr_match_power8 callbacks for POWER7/8 families. These check for POWER7/POWER7+ and POWER8/POWER8E. This changes ppc_cpu_compare_class_pvr_mask() not to check masks but use the pvr_match() callback. Since all server CPUs use the same mask, this defines one mask value - CPU_POWERPC_POWER_SERVER_MASK - which is used everywhere now. This removes other mask definitions. This removes pvr_mask from PowerPCCPUClass as it is not used anymore. This removes pvr initialization for POWER7/8 families as it is not used to find the class, the pvr_match() callback is used instead. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Alexander Graf <agraf@suse.de>
		
			
				
	
	
		
			150 lines
		
	
	
		
			4.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			150 lines
		
	
	
		
			4.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * QEMU PowerPC CPU
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|  *
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|  * Copyright (c) 2012 SUSE LINUX Products GmbH
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|  *
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|  * This library is free software; you can redistribute it and/or
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|  * modify it under the terms of the GNU Lesser General Public
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|  * License as published by the Free Software Foundation; either
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|  * version 2.1 of the License, or (at your option) any later version.
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|  *
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|  * This library is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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|  * Lesser General Public License for more details.
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|  *
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|  * You should have received a copy of the GNU Lesser General Public
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|  * License along with this library; if not, see
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|  * <http://www.gnu.org/licenses/lgpl-2.1.html>
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|  */
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| #ifndef QEMU_PPC_CPU_QOM_H
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| #define QEMU_PPC_CPU_QOM_H
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| 
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| #include "qom/cpu.h"
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| #include "cpu.h"
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| 
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| #ifdef TARGET_PPC64
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| #define TYPE_POWERPC_CPU "powerpc64-cpu"
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| #elif defined(TARGET_PPCEMB)
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| #define TYPE_POWERPC_CPU "embedded-powerpc-cpu"
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| #else
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| #define TYPE_POWERPC_CPU "powerpc-cpu"
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| #endif
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| 
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| #define POWERPC_CPU_CLASS(klass) \
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|     OBJECT_CLASS_CHECK(PowerPCCPUClass, (klass), TYPE_POWERPC_CPU)
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| #define POWERPC_CPU(obj) \
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|     OBJECT_CHECK(PowerPCCPU, (obj), TYPE_POWERPC_CPU)
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| #define POWERPC_CPU_GET_CLASS(obj) \
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|     OBJECT_GET_CLASS(PowerPCCPUClass, (obj), TYPE_POWERPC_CPU)
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| 
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| typedef struct PowerPCCPU PowerPCCPU;
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| 
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| /**
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|  * PowerPCCPUClass:
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|  * @parent_realize: The parent class' realize handler.
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|  * @parent_reset: The parent class' reset handler.
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|  *
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|  * A PowerPC CPU model.
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|  */
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| typedef struct PowerPCCPUClass {
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|     /*< private >*/
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|     CPUClass parent_class;
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|     /*< public >*/
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| 
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|     DeviceRealize parent_realize;
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|     void (*parent_reset)(CPUState *cpu);
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| 
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|     uint32_t pvr;
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|     bool (*pvr_match)(struct PowerPCCPUClass *pcc, uint32_t pvr);
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|     uint64_t pcr_mask;
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|     uint32_t svr;
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|     uint64_t insns_flags;
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|     uint64_t insns_flags2;
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|     uint64_t msr_mask;
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|     powerpc_mmu_t   mmu_model;
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|     powerpc_excp_t  excp_model;
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|     powerpc_input_t bus_model;
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|     uint32_t flags;
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|     int bfd_mach;
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|     uint32_t l1_dcache_size, l1_icache_size;
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| #if defined(TARGET_PPC64)
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|     const struct ppc_segment_page_sizes *sps;
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| #endif
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|     void (*init_proc)(CPUPPCState *env);
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|     int  (*check_pow)(CPUPPCState *env);
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| #if defined(CONFIG_SOFTMMU)
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|     int (*handle_mmu_fault)(PowerPCCPU *cpu, target_ulong eaddr, int rwx,
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|                             int mmu_idx);
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| #endif
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|     bool (*interrupts_big_endian)(PowerPCCPU *cpu);
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| } PowerPCCPUClass;
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| 
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| /**
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|  * PowerPCCPU:
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|  * @env: #CPUPPCState
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|  * @cpu_dt_id: CPU index used in the device tree. KVM uses this index too
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|  * @max_compat: Maximal supported logical PVR from the command line
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|  * @cpu_version: Current logical PVR, zero if in "raw" mode
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|  *
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|  * A PowerPC CPU.
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|  */
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| struct PowerPCCPU {
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|     /*< private >*/
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|     CPUState parent_obj;
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|     /*< public >*/
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| 
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|     CPUPPCState env;
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|     int cpu_dt_id;
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|     uint32_t max_compat;
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|     uint32_t cpu_version;
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| };
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| 
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| static inline PowerPCCPU *ppc_env_get_cpu(CPUPPCState *env)
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| {
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|     return container_of(env, PowerPCCPU, env);
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| }
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| 
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| #define ENV_GET_CPU(e) CPU(ppc_env_get_cpu(e))
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| 
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| #define ENV_OFFSET offsetof(PowerPCCPU, env)
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| 
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| PowerPCCPUClass *ppc_cpu_class_by_pvr(uint32_t pvr);
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| PowerPCCPUClass *ppc_cpu_class_by_pvr_mask(uint32_t pvr);
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| 
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| void ppc_cpu_do_interrupt(CPUState *cpu);
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| void ppc_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
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|                         int flags);
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| void ppc_cpu_dump_statistics(CPUState *cpu, FILE *f,
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|                              fprintf_function cpu_fprintf, int flags);
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| hwaddr ppc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
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| int ppc_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
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| int ppc_cpu_gdb_read_register_apple(CPUState *cpu, uint8_t *buf, int reg);
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| int ppc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
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| int ppc_cpu_gdb_write_register_apple(CPUState *cpu, uint8_t *buf, int reg);
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| int ppc64_cpu_write_elf64_qemunote(WriteCoreDumpFunction f,
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|                                    CPUState *cpu, void *opaque);
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| int ppc64_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs,
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|                                int cpuid, void *opaque);
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| #ifndef CONFIG_USER_ONLY
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| extern const struct VMStateDescription vmstate_ppc_cpu;
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| 
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| typedef struct PPCTimebase {
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|     uint64_t guest_timebase;
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|     int64_t time_of_the_day_ns;
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| } PPCTimebase;
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| 
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| extern const struct VMStateDescription vmstate_ppc_timebase;
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| 
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| #define VMSTATE_PPC_TIMEBASE_V(_field, _state, _version) {            \
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|     .name       = (stringify(_field)),                                \
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|     .version_id = (_version),                                         \
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|     .size       = sizeof(PPCTimebase),                                \
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|     .vmsd       = &vmstate_ppc_timebase,                              \
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|     .flags      = VMS_STRUCT,                                         \
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|     .offset     = vmstate_offset_value(_state, _field, PPCTimebase),  \
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| }
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| #endif
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| 
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| #endif
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