 3bcdba25df
			
		
	
	
		3bcdba25df
		
	
	
	
	
		
			
			Acked-by: Stefano Stabellini <sstabellini@kernel.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
		
			
				
	
	
		
			401 lines
		
	
	
		
			14 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			401 lines
		
	
	
		
			14 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * QEMU Xen PVH machine - common code.
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|  *
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|  * Copyright (c) 2024 Advanced Micro Devices, Inc.
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|  *
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|  * SPDX-License-Identifier: GPL-2.0-or-later
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|  */
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| 
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| #include "qemu/osdep.h"
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| #include "qemu/error-report.h"
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| #include "qapi/error.h"
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| #include "qapi/visitor.h"
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| #include "hw/boards.h"
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| #include "hw/irq.h"
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| #include "hw/sysbus.h"
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| #include "sysemu/sysemu.h"
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| #include "sysemu/tpm.h"
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| #include "sysemu/tpm_backend.h"
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| #include "hw/xen/xen-pvh-common.h"
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| #include "trace.h"
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| 
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| static const MemoryListener xen_memory_listener = {
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|     .region_add = xen_region_add,
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|     .region_del = xen_region_del,
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|     .log_start = NULL,
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|     .log_stop = NULL,
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|     .log_sync = NULL,
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|     .log_global_start = NULL,
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|     .log_global_stop = NULL,
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|     .priority = MEMORY_LISTENER_PRIORITY_ACCEL,
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| };
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| 
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| static void xen_pvh_init_ram(XenPVHMachineState *s,
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|                              MemoryRegion *sysmem)
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| {
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|     MachineState *ms = MACHINE(s);
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|     ram_addr_t block_len, ram_size[2];
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| 
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|     if (ms->ram_size <= s->cfg.ram_low.size) {
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|         ram_size[0] = ms->ram_size;
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|         ram_size[1] = 0;
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|         block_len = s->cfg.ram_low.base + ram_size[0];
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|     } else {
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|         ram_size[0] = s->cfg.ram_low.size;
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|         ram_size[1] = ms->ram_size - s->cfg.ram_low.size;
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|         block_len = s->cfg.ram_high.base + ram_size[1];
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|     }
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| 
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|     memory_region_init_ram(&xen_memory, NULL, "xen.ram", block_len,
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|                            &error_fatal);
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| 
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|     memory_region_init_alias(&s->ram.low, NULL, "xen.ram.lo", &xen_memory,
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|                              s->cfg.ram_low.base, ram_size[0]);
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|     memory_region_add_subregion(sysmem, s->cfg.ram_low.base, &s->ram.low);
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|     if (ram_size[1] > 0) {
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|         memory_region_init_alias(&s->ram.high, NULL, "xen.ram.hi", &xen_memory,
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|                                  s->cfg.ram_high.base, ram_size[1]);
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|         memory_region_add_subregion(sysmem, s->cfg.ram_high.base, &s->ram.high);
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|     }
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| 
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|     /* Setup support for grants.  */
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|     memory_region_init_ram(&xen_grants, NULL, "xen.grants", block_len,
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|                            &error_fatal);
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|     memory_region_add_subregion(sysmem, XEN_GRANT_ADDR_OFF, &xen_grants);
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| }
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| 
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| static void xen_set_irq(void *opaque, int irq, int level)
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| {
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|     if (xendevicemodel_set_irq_level(xen_dmod, xen_domid, irq, level)) {
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|         error_report("xendevicemodel_set_irq_level failed");
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|     }
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| }
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| 
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| static void xen_create_virtio_mmio_devices(XenPVHMachineState *s)
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| {
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|     int i;
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| 
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|     /*
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|      * We create the transports in reverse order. Since qbus_realize()
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|      * prepends (not appends) new child buses, the decrementing loop below will
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|      * create a list of virtio-mmio buses with increasing base addresses.
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|      *
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|      * When a -device option is processed from the command line,
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|      * qbus_find_recursive() picks the next free virtio-mmio bus in forwards
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|      * order.
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|      *
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|      * This is what the Xen tools expect.
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|      */
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|     for (i = s->cfg.virtio_mmio_num - 1; i >= 0; i--) {
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|         hwaddr base = s->cfg.virtio_mmio.base + i * s->cfg.virtio_mmio.size;
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|         qemu_irq irq = qemu_allocate_irq(xen_set_irq, NULL,
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|                                          s->cfg.virtio_mmio_irq_base + i);
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| 
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|         sysbus_create_simple("virtio-mmio", base, irq);
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| 
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|         trace_xen_create_virtio_mmio_devices(i,
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|                                              s->cfg.virtio_mmio_irq_base + i,
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|                                              base);
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|     }
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| }
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| 
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| #ifdef CONFIG_TPM
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| static void xen_enable_tpm(XenPVHMachineState *s)
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| {
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|     Error *errp = NULL;
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|     DeviceState *dev;
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|     SysBusDevice *busdev;
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| 
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|     TPMBackend *be = qemu_find_tpm_be("tpm0");
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|     if (be == NULL) {
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|         error_report("Couldn't find tmp0 backend");
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|         return;
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|     }
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|     dev = qdev_new(TYPE_TPM_TIS_SYSBUS);
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|     object_property_set_link(OBJECT(dev), "tpmdev", OBJECT(be), &errp);
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|     object_property_set_str(OBJECT(dev), "tpmdev", be->id, &errp);
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|     busdev = SYS_BUS_DEVICE(dev);
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|     sysbus_realize_and_unref(busdev, &error_fatal);
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|     sysbus_mmio_map(busdev, 0, s->cfg.tpm.base);
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| 
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|     trace_xen_enable_tpm(s->cfg.tpm.base);
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| }
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| #endif
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| 
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| /*
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|  * We use the GPEX PCIe controller with its internal INTX PCI interrupt
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|  * swizzling. This swizzling is emulated in QEMU and routes all INTX
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|  * interrupts from endpoints down to only 4 INTX interrupts.
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|  * See include/hw/pci/pci.h : pci_swizzle()
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|  */
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| static inline void xenpvh_gpex_init(XenPVHMachineState *s,
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|                                     XenPVHMachineClass *xpc,
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|                                     MemoryRegion *sysmem)
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| {
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|     MemoryRegion *ecam_reg;
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|     MemoryRegion *mmio_reg;
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|     DeviceState *dev;
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|     int i;
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| 
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|     object_initialize_child(OBJECT(s), "gpex", &s->pci.gpex,
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|                             TYPE_GPEX_HOST);
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|     dev = DEVICE(&s->pci.gpex);
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|     sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
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| 
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|     ecam_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);
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|     memory_region_add_subregion(sysmem, s->cfg.pci_ecam.base, ecam_reg);
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| 
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|     mmio_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 1);
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| 
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|     if (s->cfg.pci_mmio.size) {
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|         memory_region_init_alias(&s->pci.mmio_alias, OBJECT(dev), "pcie-mmio",
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|                                  mmio_reg,
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|                                  s->cfg.pci_mmio.base, s->cfg.pci_mmio.size);
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|         memory_region_add_subregion(sysmem, s->cfg.pci_mmio.base,
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|                                     &s->pci.mmio_alias);
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|     }
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| 
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|     if (s->cfg.pci_mmio_high.size) {
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|         memory_region_init_alias(&s->pci.mmio_high_alias, OBJECT(dev),
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|                 "pcie-mmio-high",
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|                 mmio_reg, s->cfg.pci_mmio_high.base, s->cfg.pci_mmio_high.size);
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|         memory_region_add_subregion(sysmem, s->cfg.pci_mmio_high.base,
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|                 &s->pci.mmio_high_alias);
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|     }
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| 
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|     /*
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|      * PVH implementations with PCI enabled must provide set_pci_intx_irq()
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|      * and optionally an implementation of set_pci_link_route().
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|      */
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|     assert(xpc->set_pci_intx_irq);
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| 
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|     for (i = 0; i < GPEX_NUM_IRQS; i++) {
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|         qemu_irq irq = qemu_allocate_irq(xpc->set_pci_intx_irq, s, i);
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| 
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|         sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, irq);
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|         gpex_set_irq_num(GPEX_HOST(dev), i, s->cfg.pci_intx_irq_base + i);
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|         if (xpc->set_pci_link_route) {
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|             xpc->set_pci_link_route(i, s->cfg.pci_intx_irq_base + i);
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|         }
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|     }
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| }
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| 
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| static void xen_pvh_init(MachineState *ms)
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| {
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|     XenPVHMachineState *s = XEN_PVH_MACHINE(ms);
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|     XenPVHMachineClass *xpc = XEN_PVH_MACHINE_GET_CLASS(s);
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|     MemoryRegion *sysmem = get_system_memory();
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| 
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|     if (ms->ram_size == 0) {
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|         warn_report("%s: ram size not specified. QEMU machine started"
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|                     " without IOREQ (no emulated devices including virtio)",
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|                     MACHINE_CLASS(object_get_class(OBJECT(ms)))->desc);
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|         return;
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|     }
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| 
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|     xen_pvh_init_ram(s, sysmem);
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|     xen_register_ioreq(&s->ioreq, ms->smp.max_cpus,
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|                        xpc->handle_bufioreq,
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|                        &xen_memory_listener);
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| 
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|     if (s->cfg.virtio_mmio_num) {
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|         xen_create_virtio_mmio_devices(s);
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|     }
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| 
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| #ifdef CONFIG_TPM
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|     if (xpc->has_tpm) {
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|         if (s->cfg.tpm.base) {
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|             xen_enable_tpm(s);
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|         } else {
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|             warn_report("tpm-base-addr is not set. TPM will not be enabled");
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|         }
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|     }
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| #endif
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| 
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|     /* Non-zero pci-ecam-size enables PCI.  */
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|     if (s->cfg.pci_ecam.size) {
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|         if (s->cfg.pci_ecam.size != 256 * MiB) {
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|             error_report("pci-ecam-size only supports values 0 or 0x10000000");
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|             exit(EXIT_FAILURE);
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|         }
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|         if (!s->cfg.pci_intx_irq_base) {
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|             error_report("PCI enabled but pci-intx-irq-base not set");
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|             exit(EXIT_FAILURE);
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|         }
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| 
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|         xenpvh_gpex_init(s, xpc, sysmem);
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|     }
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| 
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|     /* Call the implementation specific init.  */
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|     if (xpc->init) {
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|         xpc->init(ms);
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|     }
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| }
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| 
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| #define XEN_PVH_PROP_MEMMAP_SETTER(n, f)                                   \
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| static void xen_pvh_set_ ## n ## _ ## f(Object *obj, Visitor *v,           \
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|                                        const char *name, void *opaque,     \
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|                                        Error **errp)                       \
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| {                                                                          \
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|     XenPVHMachineState *xp = XEN_PVH_MACHINE(obj);                         \
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|     uint64_t value;                                                        \
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|                                                                            \
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|     if (!visit_type_size(v, name, &value, errp)) {                         \
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|         return;                                                            \
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|     }                                                                      \
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|     xp->cfg.n.f = value;                                                   \
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| }
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| 
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| #define XEN_PVH_PROP_MEMMAP_GETTER(n, f)                                   \
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| static void xen_pvh_get_ ## n ## _ ## f(Object *obj, Visitor *v,           \
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|                                        const char *name, void *opaque,     \
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|                                        Error **errp)                       \
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| {                                                                          \
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|     XenPVHMachineState *xp = XEN_PVH_MACHINE(obj);                         \
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|     uint64_t value = xp->cfg.n.f;                                          \
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|                                                                            \
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|     visit_type_uint64(v, name, &value, errp);                              \
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| }
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| 
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| #define XEN_PVH_PROP_MEMMAP_BASE(n)        \
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|     XEN_PVH_PROP_MEMMAP_SETTER(n, base)    \
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|     XEN_PVH_PROP_MEMMAP_GETTER(n, base)    \
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| 
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| #define XEN_PVH_PROP_MEMMAP_SIZE(n)        \
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|     XEN_PVH_PROP_MEMMAP_SETTER(n, size)    \
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|     XEN_PVH_PROP_MEMMAP_GETTER(n, size)
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| 
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| #define XEN_PVH_PROP_MEMMAP(n)             \
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|     XEN_PVH_PROP_MEMMAP_BASE(n)            \
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|     XEN_PVH_PROP_MEMMAP_SIZE(n)
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| 
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| XEN_PVH_PROP_MEMMAP(ram_low)
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| XEN_PVH_PROP_MEMMAP(ram_high)
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| /* TPM only has a base-addr option.  */
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| XEN_PVH_PROP_MEMMAP_BASE(tpm)
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| XEN_PVH_PROP_MEMMAP(virtio_mmio)
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| XEN_PVH_PROP_MEMMAP(pci_ecam)
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| XEN_PVH_PROP_MEMMAP(pci_mmio)
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| XEN_PVH_PROP_MEMMAP(pci_mmio_high)
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| 
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| static void xen_pvh_set_pci_intx_irq_base(Object *obj, Visitor *v,
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|                                           const char *name, void *opaque,
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|                                           Error **errp)
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| {
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|     XenPVHMachineState *xp = XEN_PVH_MACHINE(obj);
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|     uint32_t value;
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| 
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|     if (!visit_type_uint32(v, name, &value, errp)) {
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|         return;
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|     }
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| 
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|     xp->cfg.pci_intx_irq_base = value;
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| }
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| 
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| static void xen_pvh_get_pci_intx_irq_base(Object *obj, Visitor *v,
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|                                           const char *name, void *opaque,
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|                                           Error **errp)
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| {
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|     XenPVHMachineState *xp = XEN_PVH_MACHINE(obj);
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|     uint32_t value = xp->cfg.pci_intx_irq_base;
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| 
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|     visit_type_uint32(v, name, &value, errp);
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| }
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| 
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| void xen_pvh_class_setup_common_props(XenPVHMachineClass *xpc)
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| {
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|     ObjectClass *oc = OBJECT_CLASS(xpc);
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|     MachineClass *mc = MACHINE_CLASS(xpc);
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| 
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| #define OC_MEMMAP_PROP_BASE(c, prop_name, name)                           \
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| do {                                                                      \
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|     object_class_property_add(c, prop_name "-base", "uint64_t",           \
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|                               xen_pvh_get_ ## name ## _base,              \
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|                               xen_pvh_set_ ## name ## _base, NULL, NULL); \
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|     object_class_property_set_description(oc, prop_name "-base",          \
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|                               "Set base address for " prop_name);         \
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| } while (0)
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| 
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| #define OC_MEMMAP_PROP_SIZE(c, prop_name, name)                           \
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| do {                                                                      \
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|     object_class_property_add(c, prop_name "-size", "uint64_t",           \
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|                               xen_pvh_get_ ## name ## _size,              \
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|                               xen_pvh_set_ ## name ## _size, NULL, NULL); \
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|     object_class_property_set_description(oc, prop_name "-size",          \
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|                               "Set memory range size for " prop_name);    \
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| } while (0)
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| 
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| #define OC_MEMMAP_PROP(c, prop_name, name)                                \
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| do {                                                                      \
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|         OC_MEMMAP_PROP_BASE(c, prop_name, name);                          \
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|         OC_MEMMAP_PROP_SIZE(c, prop_name, name);                          \
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| } while (0)
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| 
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|     /*
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|      * We provide memmap properties to allow Xen to move things to other
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|      * addresses for example when users need to accomodate the memory-map
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|      * for 1:1 mapped devices/memory.
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|      */
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|     OC_MEMMAP_PROP(oc, "ram-low", ram_low);
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|     OC_MEMMAP_PROP(oc, "ram-high", ram_high);
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| 
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|     if (xpc->has_virtio_mmio) {
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|         OC_MEMMAP_PROP(oc, "virtio-mmio", virtio_mmio);
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|     }
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| 
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|     if (xpc->has_pci) {
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|         OC_MEMMAP_PROP(oc, "pci-ecam", pci_ecam);
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|         OC_MEMMAP_PROP(oc, "pci-mmio", pci_mmio);
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|         OC_MEMMAP_PROP(oc, "pci-mmio-high", pci_mmio_high);
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| 
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|         object_class_property_add(oc, "pci-intx-irq-base", "uint32_t",
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|                                   xen_pvh_get_pci_intx_irq_base,
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|                                   xen_pvh_set_pci_intx_irq_base,
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|                                   NULL, NULL);
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|         object_class_property_set_description(oc, "pci-intx-irq-base",
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|                                   "Set PCI INTX interrupt base line.");
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|     }
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| 
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| #ifdef CONFIG_TPM
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|     if (xpc->has_tpm) {
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|         object_class_property_add(oc, "tpm-base-addr", "uint64_t",
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|                                   xen_pvh_get_tpm_base,
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|                                   xen_pvh_set_tpm_base,
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|                                   NULL, NULL);
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|         object_class_property_set_description(oc, "tpm-base-addr",
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|                                   "Set Base address for TPM device.");
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| 
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|         machine_class_allow_dynamic_sysbus_dev(mc, TYPE_TPM_TIS_SYSBUS);
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|     }
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| #endif
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| }
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| 
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| static void xen_pvh_class_init(ObjectClass *oc, void *data)
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| {
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|     MachineClass *mc = MACHINE_CLASS(oc);
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| 
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|     mc->init = xen_pvh_init;
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| 
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|     mc->desc = "Xen PVH machine";
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|     mc->max_cpus = 1;
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|     mc->default_machine_opts = "accel=xen";
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|     /* Set to zero to make sure that the real ram size is passed. */
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|     mc->default_ram_size = 0;
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| }
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| 
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| static const TypeInfo xen_pvh_info = {
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|     .name = TYPE_XEN_PVH_MACHINE,
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|     .parent = TYPE_MACHINE,
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|     .abstract = true,
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|     .instance_size = sizeof(XenPVHMachineState),
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|     .class_size = sizeof(XenPVHMachineClass),
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|     .class_init = xen_pvh_class_init,
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| };
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| 
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| static void xen_pvh_register_types(void)
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| {
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|     type_register_static(&xen_pvh_info);
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| }
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| 
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| type_init(xen_pvh_register_types);
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