 7fdef0d4f2
			
		
	
	
		7fdef0d4f2
		
	
	
	
	
		
			
			Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201212155530.23098-4-cfontana@suse.de> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
		
			
				
	
	
		
			62 lines
		
	
	
		
			1.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			62 lines
		
	
	
		
			1.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * QEMU HAXM support
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|  *
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|  * Copyright (c) 2011 Intel Corporation
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|  *  Written by:
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|  *  Jiang Yunhong<yunhong.jiang@intel.com>
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|  *  Xin Xiaohui<xiaohui.xin@intel.com>
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|  *  Zhang Xiantao<xiantao.zhang@intel.com>
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|  *
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|  * This work is licensed under the terms of the GNU GPL, version 2 or later.
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|  * See the COPYING file in the top-level directory.
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|  *
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|  */
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| 
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| #ifndef TARGET_I386_HAX_POSIX_H
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| #define TARGET_I386_HAX_POSIX_H
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| 
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| #include <sys/ioctl.h>
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| 
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| #define HAX_INVALID_FD  (-1)
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| static inline int hax_invalid_fd(hax_fd fd)
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| {
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|     return fd <= 0;
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| }
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| 
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| static inline void hax_mod_close(struct hax_state *hax)
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| {
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|     close(hax->fd);
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| }
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| 
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| static inline void hax_close_fd(hax_fd fd)
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| {
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|     close(fd);
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| }
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| 
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| /* HAX model level ioctl */
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| #define HAX_IOCTL_VERSION _IOWR(0, 0x20, struct hax_module_version)
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| #define HAX_IOCTL_CREATE_VM _IOWR(0, 0x21, uint32_t)
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| #define HAX_IOCTL_DESTROY_VM _IOW(0, 0x22, uint32_t)
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| #define HAX_IOCTL_CAPABILITY _IOR(0, 0x23, struct hax_capabilityinfo)
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| 
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| #define HAX_VM_IOCTL_VCPU_CREATE _IOWR(0, 0x80, uint32_t)
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| #define HAX_VM_IOCTL_ALLOC_RAM _IOWR(0, 0x81, struct hax_alloc_ram_info)
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| #define HAX_VM_IOCTL_SET_RAM _IOWR(0, 0x82, struct hax_set_ram_info)
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| #define HAX_VM_IOCTL_VCPU_DESTROY _IOW(0, 0x83, uint32_t)
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| #define HAX_VM_IOCTL_NOTIFY_QEMU_VERSION _IOW(0, 0x84, struct hax_qemu_version)
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| #define HAX_VM_IOCTL_ADD_RAMBLOCK _IOW(0, 0x85, struct hax_ramblock_info)
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| 
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| #define HAX_VCPU_IOCTL_RUN  _IO(0, 0xc0)
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| #define HAX_VCPU_IOCTL_SET_MSRS _IOWR(0, 0xc1, struct hax_msr_data)
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| #define HAX_VCPU_IOCTL_GET_MSRS _IOWR(0, 0xc2, struct hax_msr_data)
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| 
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| #define HAX_VCPU_IOCTL_SET_FPU  _IOW(0, 0xc3, struct fx_layout)
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| #define HAX_VCPU_IOCTL_GET_FPU  _IOR(0, 0xc4, struct fx_layout)
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| 
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| #define HAX_VCPU_IOCTL_SETUP_TUNNEL _IOWR(0, 0xc5, struct hax_tunnel_info)
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| #define HAX_VCPU_IOCTL_INTERRUPT _IOWR(0, 0xc6, uint32_t)
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| #define HAX_VCPU_SET_REGS       _IOWR(0, 0xc7, struct vcpu_state_t)
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| #define HAX_VCPU_GET_REGS       _IOWR(0, 0xc8, struct vcpu_state_t)
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| 
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| #endif /* TARGET_I386_HAX_POSIX_H */
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