e6fa978d83
A clock is added by commit aac63e0e6ea3 ("hw/char/pl011: add a clock
input") since v5.2.0 which corresponds to virt-5.2 machine type. It
causes backwards migration failure from upstream to downstream (v5.1.0)
when the machine type is specified with virt-5.1.
This fixes the issue by following instructions from section "Connecting
subsections to properties" in docs/devel/migration.rst. With this applied,
the PL011 clock is migrated based on the machine type.
virt-5.2 or newer: migration
virt-5.1 or older: non-migration
Cc: qemu-stable@nongnu.org # v5.2.0+
Fixes: aac63e0e6ea3 ("hw/char/pl011: add a clock input")
Suggested-by: Andrew Jones <drjones@redhat.com>
Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Andrew Jones <drjones@redhat.com>
Message-id: 20210318023801.18287-1-gshan@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
92 lines
2.4 KiB
C
92 lines
2.4 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2 or later, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef HW_PL011_H
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#define HW_PL011_H
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#include "hw/qdev-properties.h"
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#include "hw/sysbus.h"
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#include "chardev/char-fe.h"
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#include "qapi/error.h"
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#include "qom/object.h"
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#define TYPE_PL011 "pl011"
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OBJECT_DECLARE_SIMPLE_TYPE(PL011State, PL011)
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/* This shares the same struct (and cast macro) as the base pl011 device */
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#define TYPE_PL011_LUMINARY "pl011_luminary"
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struct PL011State {
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SysBusDevice parent_obj;
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MemoryRegion iomem;
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uint32_t readbuff;
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uint32_t flags;
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uint32_t lcr;
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uint32_t rsr;
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uint32_t cr;
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uint32_t dmacr;
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uint32_t int_enabled;
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uint32_t int_level;
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uint32_t read_fifo[16];
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uint32_t ilpr;
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uint32_t ibrd;
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uint32_t fbrd;
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uint32_t ifl;
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int read_pos;
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int read_count;
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int read_trigger;
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CharBackend chr;
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qemu_irq irq[6];
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Clock *clk;
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bool migrate_clk;
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const unsigned char *id;
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};
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static inline DeviceState *pl011_create(hwaddr addr,
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qemu_irq irq,
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Chardev *chr)
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{
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DeviceState *dev;
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SysBusDevice *s;
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dev = qdev_new("pl011");
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s = SYS_BUS_DEVICE(dev);
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qdev_prop_set_chr(dev, "chardev", chr);
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sysbus_realize_and_unref(s, &error_fatal);
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sysbus_mmio_map(s, 0, addr);
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sysbus_connect_irq(s, 0, irq);
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return dev;
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}
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static inline DeviceState *pl011_luminary_create(hwaddr addr,
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qemu_irq irq,
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Chardev *chr)
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{
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DeviceState *dev;
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SysBusDevice *s;
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dev = qdev_new("pl011_luminary");
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s = SYS_BUS_DEVICE(dev);
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qdev_prop_set_chr(dev, "chardev", chr);
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sysbus_realize_and_unref(s, &error_fatal);
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sysbus_mmio_map(s, 0, addr);
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sysbus_connect_irq(s, 0, irq);
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return dev;
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}
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#endif
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