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		06f3831c08
		
	
	
	
	
		
			
			Related functions dealing with the jump cache are also updated. Signed-off-by: Anton Johansson <anjo@rev.ng> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230621135633.1649-8-anjo@rev.ng> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
		
			
				
	
	
		
			29 lines
		
	
	
		
			637 B
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			29 lines
		
	
	
		
			637 B
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * The per-CPU TranslationBlock jump cache.
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|  *
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|  *  Copyright (c) 2003 Fabrice Bellard
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|  *
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|  * SPDX-License-Identifier: GPL-2.0-or-later
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|  */
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| 
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| #ifndef ACCEL_TCG_TB_JMP_CACHE_H
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| #define ACCEL_TCG_TB_JMP_CACHE_H
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| 
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| #define TB_JMP_CACHE_BITS 12
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| #define TB_JMP_CACHE_SIZE (1 << TB_JMP_CACHE_BITS)
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| 
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| /*
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|  * Accessed in parallel; all accesses to 'tb' must be atomic.
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|  * For CF_PCREL, accesses to 'pc' must be protected by a
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|  * load_acquire/store_release to 'tb'.
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|  */
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| struct CPUJumpCache {
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|     struct rcu_head rcu;
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|     struct {
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|         TranslationBlock *tb;
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|         vaddr pc;
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|     } array[TB_JMP_CACHE_SIZE];
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| };
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| 
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| #endif /* ACCEL_TCG_TB_JMP_CACHE_H */
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