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			PCIDeviceClass and PCIDevice are defined in pci.h. Many users of the header don't actually need them. Similar structs live in their own headers: PCIBusClass and PCIBus in pci_bus.h, PCIBridge in pci_bridge.h, PCIHostBridgeClass and PCIHostState in pci_host.h, PCIExpressHost in pcie_host.h, and PCIERootPortClass, PCIEPort, and PCIESlot in pcie_port.h. Move PCIDeviceClass and PCIDeviceClass to new pci_device.h, along with the code that needs them. Adjust include directives. This also enables the next commit. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20221222100330.380143-6-armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
		
			
				
	
	
		
			223 lines
		
	
	
		
			7.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			223 lines
		
	
	
		
			7.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * QEMU 16550A multi UART emulation
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|  *
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|  * SPDX-License-Identifier: MIT
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|  *
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|  * Copyright (c) 2003-2004 Fabrice Bellard
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|  * Copyright (c) 2008 Citrix Systems, Inc.
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|  *
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|  * Permission is hereby granted, free of charge, to any person obtaining a copy
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|  * of this software and associated documentation files (the "Software"), to deal
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|  * in the Software without restriction, including without limitation the rights
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|  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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|  * copies of the Software, and to permit persons to whom the Software is
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|  * furnished to do so, subject to the following conditions:
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|  *
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|  * The above copyright notice and this permission notice shall be included in
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|  * all copies or substantial portions of the Software.
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|  *
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|  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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|  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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|  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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|  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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|  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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|  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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|  * THE SOFTWARE.
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|  */
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| 
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| /* see docs/specs/pci-serial.txt */
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| 
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| #include "qemu/osdep.h"
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| #include "qapi/error.h"
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| #include "hw/char/serial.h"
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| #include "hw/irq.h"
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| #include "hw/pci/pci_device.h"
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| #include "hw/qdev-properties.h"
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| #include "hw/qdev-properties-system.h"
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| #include "migration/vmstate.h"
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| 
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| #define PCI_SERIAL_MAX_PORTS 4
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| 
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| typedef struct PCIMultiSerialState {
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|     PCIDevice    dev;
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|     MemoryRegion iobar;
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|     uint32_t     ports;
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|     char         *name[PCI_SERIAL_MAX_PORTS];
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|     SerialState  state[PCI_SERIAL_MAX_PORTS];
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|     uint32_t     level[PCI_SERIAL_MAX_PORTS];
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|     qemu_irq     *irqs;
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|     uint8_t      prog_if;
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| } PCIMultiSerialState;
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| 
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| static void multi_serial_pci_exit(PCIDevice *dev)
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| {
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|     PCIMultiSerialState *pci = DO_UPCAST(PCIMultiSerialState, dev, dev);
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|     SerialState *s;
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|     int i;
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| 
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|     for (i = 0; i < pci->ports; i++) {
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|         s = pci->state + i;
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|         qdev_unrealize(DEVICE(s));
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|         memory_region_del_subregion(&pci->iobar, &s->io);
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|         g_free(pci->name[i]);
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|     }
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|     qemu_free_irqs(pci->irqs, pci->ports);
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| }
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| 
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| static void multi_serial_irq_mux(void *opaque, int n, int level)
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| {
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|     PCIMultiSerialState *pci = opaque;
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|     int i, pending = 0;
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| 
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|     pci->level[n] = level;
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|     for (i = 0; i < pci->ports; i++) {
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|         if (pci->level[i]) {
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|             pending = 1;
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|         }
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|     }
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|     pci_set_irq(&pci->dev, pending);
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| }
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| 
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| static size_t multi_serial_get_port_count(PCIDeviceClass *pc)
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| {
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|     switch (pc->device_id) {
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|     case 0x0003:
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|         return 2;
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|     case 0x0004:
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|         return 4;
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|     }
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| 
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|     g_assert_not_reached();
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| }
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| 
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| 
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| static void multi_serial_pci_realize(PCIDevice *dev, Error **errp)
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| {
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|     PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev);
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|     PCIMultiSerialState *pci = DO_UPCAST(PCIMultiSerialState, dev, dev);
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|     SerialState *s;
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|     size_t i, nports = multi_serial_get_port_count(pc);
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| 
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|     pci->dev.config[PCI_CLASS_PROG] = pci->prog_if;
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|     pci->dev.config[PCI_INTERRUPT_PIN] = 0x01;
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|     memory_region_init(&pci->iobar, OBJECT(pci), "multiserial", 8 * nports);
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|     pci_register_bar(&pci->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &pci->iobar);
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|     pci->irqs = qemu_allocate_irqs(multi_serial_irq_mux, pci, nports);
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| 
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|     for (i = 0; i < nports; i++) {
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|         s = pci->state + i;
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|         if (!qdev_realize(DEVICE(s), NULL, errp)) {
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|             multi_serial_pci_exit(dev);
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|             return;
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|         }
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|         s->irq = pci->irqs[i];
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|         pci->name[i] = g_strdup_printf("uart #%zu", i + 1);
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|         memory_region_init_io(&s->io, OBJECT(pci), &serial_io_ops, s,
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|                               pci->name[i], 8);
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|         memory_region_add_subregion(&pci->iobar, 8 * i, &s->io);
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|         pci->ports++;
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|     }
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| }
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| 
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| static const VMStateDescription vmstate_pci_multi_serial = {
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|     .name = "pci-serial-multi",
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|     .version_id = 1,
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|     .minimum_version_id = 1,
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|     .fields = (VMStateField[]) {
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|         VMSTATE_PCI_DEVICE(dev, PCIMultiSerialState),
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|         VMSTATE_STRUCT_ARRAY(state, PCIMultiSerialState, PCI_SERIAL_MAX_PORTS,
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|                              0, vmstate_serial, SerialState),
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|         VMSTATE_UINT32_ARRAY(level, PCIMultiSerialState, PCI_SERIAL_MAX_PORTS),
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|         VMSTATE_END_OF_LIST()
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|     }
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| };
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| 
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| static Property multi_2x_serial_pci_properties[] = {
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|     DEFINE_PROP_CHR("chardev1",  PCIMultiSerialState, state[0].chr),
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|     DEFINE_PROP_CHR("chardev2",  PCIMultiSerialState, state[1].chr),
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|     DEFINE_PROP_UINT8("prog_if",  PCIMultiSerialState, prog_if, 0x02),
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|     DEFINE_PROP_END_OF_LIST(),
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| };
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| 
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| static Property multi_4x_serial_pci_properties[] = {
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|     DEFINE_PROP_CHR("chardev1",  PCIMultiSerialState, state[0].chr),
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|     DEFINE_PROP_CHR("chardev2",  PCIMultiSerialState, state[1].chr),
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|     DEFINE_PROP_CHR("chardev3",  PCIMultiSerialState, state[2].chr),
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|     DEFINE_PROP_CHR("chardev4",  PCIMultiSerialState, state[3].chr),
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|     DEFINE_PROP_UINT8("prog_if",  PCIMultiSerialState, prog_if, 0x02),
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|     DEFINE_PROP_END_OF_LIST(),
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| };
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| 
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| static void multi_2x_serial_pci_class_initfn(ObjectClass *klass, void *data)
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| {
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|     DeviceClass *dc = DEVICE_CLASS(klass);
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|     PCIDeviceClass *pc = PCI_DEVICE_CLASS(klass);
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|     pc->realize = multi_serial_pci_realize;
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|     pc->exit = multi_serial_pci_exit;
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|     pc->vendor_id = PCI_VENDOR_ID_REDHAT;
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|     pc->device_id = PCI_DEVICE_ID_REDHAT_SERIAL2;
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|     pc->revision = 1;
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|     pc->class_id = PCI_CLASS_COMMUNICATION_SERIAL;
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|     dc->vmsd = &vmstate_pci_multi_serial;
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|     device_class_set_props(dc, multi_2x_serial_pci_properties);
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|     set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
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| }
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| 
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| static void multi_4x_serial_pci_class_initfn(ObjectClass *klass, void *data)
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| {
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|     DeviceClass *dc = DEVICE_CLASS(klass);
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|     PCIDeviceClass *pc = PCI_DEVICE_CLASS(klass);
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|     pc->realize = multi_serial_pci_realize;
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|     pc->exit = multi_serial_pci_exit;
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|     pc->vendor_id = PCI_VENDOR_ID_REDHAT;
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|     pc->device_id = PCI_DEVICE_ID_REDHAT_SERIAL4;
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|     pc->revision = 1;
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|     pc->class_id = PCI_CLASS_COMMUNICATION_SERIAL;
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|     dc->vmsd = &vmstate_pci_multi_serial;
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|     device_class_set_props(dc, multi_4x_serial_pci_properties);
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|     set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
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| }
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| 
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| static void multi_serial_init(Object *o)
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| {
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|     PCIDevice *dev = PCI_DEVICE(o);
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|     PCIMultiSerialState *pms = DO_UPCAST(PCIMultiSerialState, dev, dev);
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|     size_t i, nports = multi_serial_get_port_count(PCI_DEVICE_GET_CLASS(dev));
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| 
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|     for (i = 0; i < nports; i++) {
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|         object_initialize_child(o, "serial[*]", &pms->state[i], TYPE_SERIAL);
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|     }
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| }
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| 
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| static const TypeInfo multi_2x_serial_pci_info = {
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|     .name          = "pci-serial-2x",
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|     .parent        = TYPE_PCI_DEVICE,
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|     .instance_size = sizeof(PCIMultiSerialState),
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|     .instance_init = multi_serial_init,
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|     .class_init    = multi_2x_serial_pci_class_initfn,
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|     .interfaces = (InterfaceInfo[]) {
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|         { INTERFACE_CONVENTIONAL_PCI_DEVICE },
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|         { },
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|     },
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| };
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| 
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| static const TypeInfo multi_4x_serial_pci_info = {
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|     .name          = "pci-serial-4x",
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|     .parent        = TYPE_PCI_DEVICE,
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|     .instance_size = sizeof(PCIMultiSerialState),
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|     .instance_init = multi_serial_init,
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|     .class_init    = multi_4x_serial_pci_class_initfn,
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|     .interfaces = (InterfaceInfo[]) {
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|         { INTERFACE_CONVENTIONAL_PCI_DEVICE },
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|         { },
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|     },
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| };
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| 
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| static void multi_serial_pci_register_types(void)
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| {
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|     type_register_static(&multi_2x_serial_pci_info);
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|     type_register_static(&multi_4x_serial_pci_info);
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| }
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| 
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| type_init(multi_serial_pci_register_types)
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