 0b8fa32f55
			
		
	
	
		0b8fa32f55
		
	
	
	
	
		
			
			Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190523143508.25387-4-armbru@redhat.com> [Rebased with conflicts resolved automatically, except for hw/usb/dev-hub.c hw/misc/exynos4210_rng.c hw/misc/bcm2835_rng.c hw/misc/aspeed_scu.c hw/display/virtio-vga.c hw/arm/stm32f205_soc.c; ui/cocoa.m fixed up]
		
			
				
	
	
		
			91 lines
		
	
	
		
			2.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			91 lines
		
	
	
		
			2.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Copyright (c) 2018, Impinj, Inc.
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|  *
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|  * i.MX2 Watchdog IP block
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|  *
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|  * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
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|  *
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|  * This work is licensed under the terms of the GNU GPL, version 2 or later.
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|  * See the COPYING file in the top-level directory.
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|  */
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| 
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| #include "qemu/osdep.h"
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| #include "qemu/bitops.h"
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| #include "qemu/module.h"
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| #include "sysemu/watchdog.h"
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| 
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| #include "hw/misc/imx2_wdt.h"
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| 
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| #define IMX2_WDT_WCR_WDA    BIT(5)      /* -> External Reset WDOG_B */
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| #define IMX2_WDT_WCR_SRS    BIT(4)      /* -> Software Reset Signal */
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| 
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| static uint64_t imx2_wdt_read(void *opaque, hwaddr addr,
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|                               unsigned int size)
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| {
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|     return 0;
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| }
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| 
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| static void imx2_wdt_write(void *opaque, hwaddr addr,
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|                            uint64_t value, unsigned int size)
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| {
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|     if (addr == IMX2_WDT_WCR &&
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|         (value & (IMX2_WDT_WCR_WDA | IMX2_WDT_WCR_SRS))) {
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|         watchdog_perform_action();
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|     }
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| }
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| 
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| static const MemoryRegionOps imx2_wdt_ops = {
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|     .read  = imx2_wdt_read,
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|     .write = imx2_wdt_write,
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|     .endianness = DEVICE_NATIVE_ENDIAN,
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|     .impl = {
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|         /*
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|          * Our device would not work correctly if the guest was doing
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|          * unaligned access. This might not be a limitation on the
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|          * real device but in practice there is no reason for a guest
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|          * to access this device unaligned.
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|          */
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|         .min_access_size = 4,
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|         .max_access_size = 4,
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|         .unaligned = false,
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|     },
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| };
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| 
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| static void imx2_wdt_realize(DeviceState *dev, Error **errp)
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| {
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|     IMX2WdtState *s = IMX2_WDT(dev);
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| 
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|     memory_region_init_io(&s->mmio, OBJECT(dev),
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|                           &imx2_wdt_ops, s,
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|                           TYPE_IMX2_WDT".mmio",
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|                           IMX2_WDT_REG_NUM * sizeof(uint16_t));
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|     sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->mmio);
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| }
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| 
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| static void imx2_wdt_class_init(ObjectClass *klass, void *data)
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| {
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|     DeviceClass *dc = DEVICE_CLASS(klass);
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| 
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|     dc->realize = imx2_wdt_realize;
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|     set_bit(DEVICE_CATEGORY_MISC, dc->categories);
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| }
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| 
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| static const TypeInfo imx2_wdt_info = {
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|     .name          = TYPE_IMX2_WDT,
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|     .parent        = TYPE_SYS_BUS_DEVICE,
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|     .instance_size = sizeof(IMX2WdtState),
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|     .class_init    = imx2_wdt_class_init,
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| };
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| 
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| static WatchdogTimerModel model = {
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|     .wdt_name = "imx2-watchdog",
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|     .wdt_description = "i.MX2 Watchdog",
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| };
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| 
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| static void imx2_wdt_register_type(void)
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| {
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|     watchdog_add_model(&model);
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|     type_register_static(&imx2_wdt_info);
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| }
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| type_init(imx2_wdt_register_type)
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