65cb7129f4
- Ignore writes to CNTP_CTL_EL0 on HVF ARM (Alexander)
- Add '-d invalid_mem' logging option (Zoltan)
- Create QOM containers explicitly (Peter)
- Rename sysemu/ -> system/ (Philippe)
- Re-orderning of include/exec/ headers (Philippe)
Move a lot of declarations from these legacy mixed bag headers:
. "exec/cpu-all.h"
. "exec/cpu-common.h"
. "exec/cpu-defs.h"
. "exec/exec-all.h"
. "exec/translate-all"
to these more specific ones:
. "exec/page-protection.h"
. "exec/translation-block.h"
. "user/cpu_loop.h"
. "user/guest-host.h"
. "user/page-protection.h"
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Merge tag 'exec-20241220' of https://github.com/philmd/qemu into staging
Accel & Exec patch queue
- Ignore writes to CNTP_CTL_EL0 on HVF ARM (Alexander)
- Add '-d invalid_mem' logging option (Zoltan)
- Create QOM containers explicitly (Peter)
- Rename sysemu/ -> system/ (Philippe)
- Re-orderning of include/exec/ headers (Philippe)
Move a lot of declarations from these legacy mixed bag headers:
. "exec/cpu-all.h"
. "exec/cpu-common.h"
. "exec/cpu-defs.h"
. "exec/exec-all.h"
. "exec/translate-all"
to these more specific ones:
. "exec/page-protection.h"
. "exec/translation-block.h"
. "user/cpu_loop.h"
. "user/guest-host.h"
. "user/page-protection.h"
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# gpg: Signature made Fri 20 Dec 2024 11:45:20 EST
# gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE
* tag 'exec-20241220' of https://github.com/philmd/qemu: (59 commits)
util/qemu-timer: fix indentation
meson: Do not define CONFIG_DEVICES on user emulation
system/accel-ops: Remove unnecessary 'exec/cpu-common.h' header
system/numa: Remove unnecessary 'exec/cpu-common.h' header
hw/xen: Remove unnecessary 'exec/cpu-common.h' header
target/mips: Drop left-over comment about Jazz machine
target/mips: Remove tswap() calls in semihosting uhi_fstat_cb()
target/xtensa: Remove tswap() calls in semihosting simcall() helper
accel/tcg: Un-inline translator_is_same_page()
accel/tcg: Include missing 'exec/translation-block.h' header
accel/tcg: Move tcg_cflags_has/set() to 'exec/translation-block.h'
accel/tcg: Restrict curr_cflags() declaration to 'internal-common.h'
qemu/coroutine: Include missing 'qemu/atomic.h' header
exec/translation-block: Include missing 'qemu/atomic.h' header
accel/tcg: Declare cpu_loop_exit_requested() in 'exec/cpu-common.h'
exec/cpu-all: Include 'cpu.h' earlier so MMU_USER_IDX is always defined
target/sparc: Move sparc_restore_state_to_opc() to cpu.c
target/sparc: Uninline cpu_get_tb_cpu_state()
target/loongarch: Declare loongarch_cpu_dump_state() locally
user: Move various declarations out of 'exec/exec-all.h'
...
Conflicts:
hw/char/riscv_htif.c
hw/intc/riscv_aplic.c
target/s390x/cpu.c
Apply sysemu header path changes to not in the pull request.
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
86 lines
2.4 KiB
C
86 lines
2.4 KiB
C
/*
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* debug exit port emulation
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 or
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* (at your option) any later version.
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*/
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#include "qemu/osdep.h"
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#include "hw/isa/isa.h"
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#include "hw/qdev-properties.h"
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#include "qemu/module.h"
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#include "qom/object.h"
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#include "system/runstate.h"
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#define TYPE_ISA_DEBUG_EXIT_DEVICE "isa-debug-exit"
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OBJECT_DECLARE_SIMPLE_TYPE(ISADebugExitState, ISA_DEBUG_EXIT_DEVICE)
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struct ISADebugExitState {
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ISADevice parent_obj;
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uint32_t iobase;
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uint32_t iosize;
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MemoryRegion io;
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};
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static uint64_t debug_exit_read(void *opaque, hwaddr addr, unsigned size)
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{
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return 0;
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}
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static void debug_exit_write(void *opaque, hwaddr addr, uint64_t val,
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unsigned width)
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{
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qemu_system_shutdown_request_with_code(SHUTDOWN_CAUSE_GUEST_SHUTDOWN,
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(val << 1) | 1);
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}
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static const MemoryRegionOps debug_exit_ops = {
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.read = debug_exit_read,
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.write = debug_exit_write,
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.valid.min_access_size = 1,
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.valid.max_access_size = 4,
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.endianness = DEVICE_LITTLE_ENDIAN,
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};
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static void debug_exit_realizefn(DeviceState *d, Error **errp)
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{
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ISADevice *dev = ISA_DEVICE(d);
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ISADebugExitState *isa = ISA_DEBUG_EXIT_DEVICE(d);
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memory_region_init_io(&isa->io, OBJECT(dev), &debug_exit_ops, isa,
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TYPE_ISA_DEBUG_EXIT_DEVICE, isa->iosize);
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memory_region_add_subregion(isa_address_space_io(dev),
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isa->iobase, &isa->io);
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}
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static const Property debug_exit_properties[] = {
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DEFINE_PROP_UINT32("iobase", ISADebugExitState, iobase, 0x501),
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DEFINE_PROP_UINT32("iosize", ISADebugExitState, iosize, 0x02),
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};
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static void debug_exit_class_initfn(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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dc->realize = debug_exit_realizefn;
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device_class_set_props(dc, debug_exit_properties);
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set_bit(DEVICE_CATEGORY_MISC, dc->categories);
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}
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static const TypeInfo debug_exit_info = {
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.name = TYPE_ISA_DEBUG_EXIT_DEVICE,
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.parent = TYPE_ISA_DEVICE,
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.instance_size = sizeof(ISADebugExitState),
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.class_init = debug_exit_class_initfn,
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};
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static void debug_exit_register_types(void)
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{
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type_register_static(&debug_exit_info);
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}
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type_init(debug_exit_register_types)
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