32dbebcc7e
The Xilinx Versal CANFD controller is developed based on SocketCAN, QEMU CAN bus implementation. Bus connection and socketCAN connection for each CAN module can be set through command lines. Signed-off-by: Vikram Garhwal <vikram.garhwal@amd.com> Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
88 lines
3.0 KiB
C
88 lines
3.0 KiB
C
/*
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* QEMU model of the Xilinx Versal CANFD Controller.
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*
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* Copyright (c) 2023 Advanced Micro Devices, Inc.
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*
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* Written-by: Vikram Garhwal<vikram.garhwal@amd.com>
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* Based on QEMU CANFD Device emulation implemented by Jin Yang, Deniz Eren and
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* Pavel Pisa.
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef HW_CANFD_XILINX_H
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#define HW_CANFD_XILINX_H
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#include "hw/register.h"
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#include "hw/ptimer.h"
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#include "net/can_emu.h"
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#include "hw/qdev-clock.h"
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#define TYPE_XILINX_CANFD "xlnx.versal-canfd"
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OBJECT_DECLARE_SIMPLE_TYPE(XlnxVersalCANFDState, XILINX_CANFD)
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#define NUM_REGS_PER_MSG_SPACE 18 /* 1 ID + 1 DLC + 16 Data(DW0 - DW15) regs. */
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#define MAX_NUM_RX 64
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#define OFFSET_RX1_DW15 (0x4144 / 4)
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#define CANFD_TIMER_MAX 0xFFFFUL
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#define CANFD_DEFAULT_CLOCK (25 * 1000 * 1000)
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#define XLNX_VERSAL_CANFD_R_MAX (OFFSET_RX1_DW15 + \
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((MAX_NUM_RX - 1) * NUM_REGS_PER_MSG_SPACE) + 1)
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typedef struct XlnxVersalCANFDState {
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SysBusDevice parent_obj;
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MemoryRegion iomem;
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qemu_irq irq_canfd_int;
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qemu_irq irq_addr_err;
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RegisterInfo reg_info[XLNX_VERSAL_CANFD_R_MAX];
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RegisterAccessInfo *tx_regs;
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RegisterAccessInfo *rx0_regs;
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RegisterAccessInfo *rx1_regs;
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RegisterAccessInfo *af_regs;
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RegisterAccessInfo *txe_regs;
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RegisterAccessInfo *rx_mailbox_regs;
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RegisterAccessInfo *af_mask_regs_mailbox;
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uint32_t regs[XLNX_VERSAL_CANFD_R_MAX];
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ptimer_state *canfd_timer;
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CanBusClientState bus_client;
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CanBusState *canfdbus;
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struct {
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uint8_t rx0_fifo;
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uint8_t rx1_fifo;
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uint8_t tx_fifo;
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bool enable_rx_fifo1;
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uint32_t ext_clk_freq;
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} cfg;
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} XlnxVersalCANFDState;
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typedef struct tx_ready_reg_info {
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uint32_t can_id;
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uint32_t reg_num;
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} tx_ready_reg_info;
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#endif
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