Add a primitive for InvSubBytes + InvShiftRows + AddRoundKey + InvMixColumns. Acked-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
		
			
				
	
	
		
			165 lines
		
	
	
		
			4.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			165 lines
		
	
	
		
			4.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * AES round fragments, generic version
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 * SPDX-License-Identifier: GPL-2.0-or-later
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 *
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 * Copyright (C) 2023 Linaro, Ltd.
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 */
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#ifndef CRYPTO_AES_ROUND_H
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#define CRYPTO_AES_ROUND_H
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/* Hosts with acceleration will usually need a 16-byte vector type. */
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typedef uint8_t AESStateVec __attribute__((vector_size(16)));
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typedef union {
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    uint8_t b[16];
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    uint32_t w[4];
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    uint64_t d[2];
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    AESStateVec v;
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} AESState;
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#include "host/crypto/aes-round.h"
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/*
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 * Perform MixColumns.
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 */
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void aesenc_MC_gen(AESState *ret, const AESState *st);
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void aesenc_MC_genrev(AESState *ret, const AESState *st);
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static inline void aesenc_MC(AESState *r, const AESState *st, bool be)
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{
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    if (HAVE_AES_ACCEL) {
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        aesenc_MC_accel(r, st, be);
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    } else if (HOST_BIG_ENDIAN == be) {
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        aesenc_MC_gen(r, st);
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    } else {
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        aesenc_MC_genrev(r, st);
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    }
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}
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/*
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 * Perform SubBytes + ShiftRows + AddRoundKey.
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 */
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void aesenc_SB_SR_AK_gen(AESState *ret, const AESState *st,
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                         const AESState *rk);
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void aesenc_SB_SR_AK_genrev(AESState *ret, const AESState *st,
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                            const AESState *rk);
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static inline void aesenc_SB_SR_AK(AESState *r, const AESState *st,
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                                   const AESState *rk, bool be)
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{
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    if (HAVE_AES_ACCEL) {
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        aesenc_SB_SR_AK_accel(r, st, rk, be);
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    } else if (HOST_BIG_ENDIAN == be) {
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        aesenc_SB_SR_AK_gen(r, st, rk);
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    } else {
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        aesenc_SB_SR_AK_genrev(r, st, rk);
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    }
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}
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/*
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 * Perform SubBytes + ShiftRows + MixColumns + AddRoundKey.
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 */
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void aesenc_SB_SR_MC_AK_gen(AESState *ret, const AESState *st,
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                            const AESState *rk);
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void aesenc_SB_SR_MC_AK_genrev(AESState *ret, const AESState *st,
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                               const AESState *rk);
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static inline void aesenc_SB_SR_MC_AK(AESState *r, const AESState *st,
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                                      const AESState *rk, bool be)
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{
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    if (HAVE_AES_ACCEL) {
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        aesenc_SB_SR_MC_AK_accel(r, st, rk, be);
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    } else if (HOST_BIG_ENDIAN == be) {
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        aesenc_SB_SR_MC_AK_gen(r, st, rk);
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    } else {
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        aesenc_SB_SR_MC_AK_genrev(r, st, rk);
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    }
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}
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/*
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 * Perform InvMixColumns.
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 */
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void aesdec_IMC_gen(AESState *ret, const AESState *st);
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void aesdec_IMC_genrev(AESState *ret, const AESState *st);
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static inline void aesdec_IMC(AESState *r, const AESState *st, bool be)
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{
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    if (HAVE_AES_ACCEL) {
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        aesdec_IMC_accel(r, st, be);
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    } else if (HOST_BIG_ENDIAN == be) {
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        aesdec_IMC_gen(r, st);
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    } else {
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        aesdec_IMC_genrev(r, st);
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    }
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}
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/*
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 * Perform InvSubBytes + InvShiftRows + AddRoundKey.
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 */
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void aesdec_ISB_ISR_AK_gen(AESState *ret, const AESState *st,
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                           const AESState *rk);
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void aesdec_ISB_ISR_AK_genrev(AESState *ret, const AESState *st,
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                              const AESState *rk);
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static inline void aesdec_ISB_ISR_AK(AESState *r, const AESState *st,
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                                     const AESState *rk, bool be)
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{
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    if (HAVE_AES_ACCEL) {
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        aesdec_ISB_ISR_AK_accel(r, st, rk, be);
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    } else if (HOST_BIG_ENDIAN == be) {
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        aesdec_ISB_ISR_AK_gen(r, st, rk);
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    } else {
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        aesdec_ISB_ISR_AK_genrev(r, st, rk);
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    }
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}
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/*
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 * Perform InvSubBytes + InvShiftRows + AddRoundKey + InvMixColumns.
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 */
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void aesdec_ISB_ISR_AK_IMC_gen(AESState *ret, const AESState *st,
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                               const AESState *rk);
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void aesdec_ISB_ISR_AK_IMC_genrev(AESState *ret, const AESState *st,
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                                  const AESState *rk);
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static inline void aesdec_ISB_ISR_AK_IMC(AESState *r, const AESState *st,
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                                         const AESState *rk, bool be)
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{
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    if (HAVE_AES_ACCEL) {
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        aesdec_ISB_ISR_AK_IMC_accel(r, st, rk, be);
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    } else if (HOST_BIG_ENDIAN == be) {
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        aesdec_ISB_ISR_AK_IMC_gen(r, st, rk);
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    } else {
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        aesdec_ISB_ISR_AK_IMC_genrev(r, st, rk);
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    }
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}
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/*
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 * Perform InvSubBytes + InvShiftRows + InvMixColumns + AddRoundKey.
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 */
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void aesdec_ISB_ISR_IMC_AK_gen(AESState *ret, const AESState *st,
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                               const AESState *rk);
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void aesdec_ISB_ISR_IMC_AK_genrev(AESState *ret, const AESState *st,
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                                  const AESState *rk);
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static inline void aesdec_ISB_ISR_IMC_AK(AESState *r, const AESState *st,
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                                         const AESState *rk, bool be)
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{
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    if (HAVE_AES_ACCEL) {
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        aesdec_ISB_ISR_IMC_AK_accel(r, st, rk, be);
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    } else if (HOST_BIG_ENDIAN == be) {
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        aesdec_ISB_ISR_IMC_AK_gen(r, st, rk);
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    } else {
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        aesdec_ISB_ISR_IMC_AK_genrev(r, st, rk);
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    }
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}
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#endif /* CRYPTO_AES_ROUND_H */
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