Laurent Vivier ba62494483 target-m68k: add FPCR and FPSR ...

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-Id: <20170620205121.26515-6-laurent@vivier.eu>

2017-06-21 22:11:55 +02:00

..

alpha

target/alpha: Use goto_tb for fallthru between TBs

2017-06-05 09:25:42 -07:00

arm

x86 and machine queue, 2017-06-05

2017-06-06 10:00:34 +01:00

cris

qom/cpu: move tlb_flush to cpu_common_reset

2017-01-13 14:24:31 +00:00

hppa

target/hppa: Use tcg_gen_lookup_and_goto_ptr

2017-06-05 09:25:42 -07:00

i386

hax-all: make async_safe_run_on_cpu safe on HAX too

2017-06-15 11:04:05 +02:00

lm32

qom/cpu: move tlb_flush to cpu_common_reset

2017-01-13 14:24:31 +00:00

m68k

target-m68k: add FPCR and FPSR

2017-06-21 22:11:55 +02:00

microblaze

cputlb: drop flush_global flag from tlb_flush

2017-01-13 14:24:37 +00:00

mips

target/mips: optimize indirect branches

2017-06-05 09:25:42 -07:00

moxie

qom/cpu: move tlb_flush to cpu_common_reset

2017-01-13 14:24:31 +00:00

nios2

target/nios2: Fix 64-bit ilp32 compilation

2017-06-05 09:25:42 -07:00

openrisc

target/openrisc: Support non-busy idle state using PMR SPR

2017-05-04 09:39:14 +09:00

ppc

target/ppc: fix memory leak in kvmppc_is_mem_backend_page_size_ok()

2017-06-08 11:05:31 +10:00

s390x

s390x/cpumodel: wire up cpu type + id for TCG

2017-06-13 11:09:39 -07:00

sh4

target/sh4: fix RTE instruction delay slot

2017-05-30 21:00:56 +02:00

sparc

shutdown: Add source information to SHUTDOWN and RESET

2017-05-23 13:28:17 +02:00

tilegx

migration: Remove unneeded includes of migration/vmstate.h

2017-06-01 18:49:22 +02:00

tricore

qom/cpu: move tlb_flush to cpu_common_reset

2017-01-13 14:24:31 +00:00

unicore32

cputlb: drop flush_global flag from tlb_flush

2017-01-13 14:24:37 +00:00

xtensa

target/xtensa: handle unknown registers in gdbstub

2017-06-06 02:40:48 -07:00