This way, ds1338-test will run for every machine that exposes an i2c-bus. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
		
			
				
	
	
		
			217 lines
		
	
	
		
			6.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			217 lines
		
	
	
		
			6.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * QTest i.MX I2C driver
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 *
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 * Copyright (c) 2013 Jean-Christophe Dubois
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 *
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 *  This program is free software; you can redistribute it and/or modify it
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 *  under the terms of the GNU General Public License as published by the
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 *  Free Software Foundation; either version 2 of the License, or
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 *  (at your option) any later version.
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 *
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 *  This program is distributed in the hope that it will be useful, but WITHOUT
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 *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 *  FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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 *  for more details.
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 *
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 *  You should have received a copy of the GNU General Public License along
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 *  with this program; if not, see <http://www.gnu.org/licenses/>.
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 */
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#include "qemu/osdep.h"
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#include "libqos/i2c.h"
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#include "libqtest.h"
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#include "hw/i2c/imx_i2c.h"
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enum IMXI2CDirection {
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    IMX_I2C_READ,
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    IMX_I2C_WRITE,
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};
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static void imx_i2c_set_slave_addr(IMXI2C *s, uint8_t addr,
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                                   enum IMXI2CDirection direction)
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{
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    qtest_writeb(s->parent.qts, s->addr + I2DR_ADDR,
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                 (addr << 1) | (direction == IMX_I2C_READ ? 1 : 0));
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}
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static void imx_i2c_send(I2CAdapter *i2c, uint8_t addr,
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                         const uint8_t *buf, uint16_t len)
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{
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    IMXI2C *s = container_of(i2c, IMXI2C, parent);
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    uint8_t data;
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    uint8_t status;
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    uint16_t size = 0;
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    if (!len) {
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        return;
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    }
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    /* set the bus for write */
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    data = I2CR_IEN |
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           I2CR_IIEN |
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           I2CR_MSTA |
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           I2CR_MTX |
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           I2CR_TXAK;
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    qtest_writeb(i2c->qts, s->addr + I2CR_ADDR, data);
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    status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
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    g_assert((status & I2SR_IBB) != 0);
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    /* set the slave address */
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    imx_i2c_set_slave_addr(s, addr, IMX_I2C_WRITE);
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    status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
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    g_assert((status & I2SR_IIF) != 0);
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    g_assert((status & I2SR_RXAK) == 0);
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    /* ack the interrupt */
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    qtest_writeb(i2c->qts, s->addr + I2SR_ADDR, 0);
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    status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
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    g_assert((status & I2SR_IIF) == 0);
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    while (size < len) {
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        /* check we are still busy */
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        status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
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        g_assert((status & I2SR_IBB) != 0);
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        /* write the data */
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        qtest_writeb(i2c->qts, s->addr + I2DR_ADDR, buf[size]);
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        status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
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        g_assert((status & I2SR_IIF) != 0);
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        g_assert((status & I2SR_RXAK) == 0);
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        /* ack the interrupt */
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        qtest_writeb(i2c->qts, s->addr + I2SR_ADDR, 0);
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        status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
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        g_assert((status & I2SR_IIF) == 0);
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        size++;
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    }
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    /* release the bus */
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    data &= ~(I2CR_MSTA | I2CR_MTX);
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    qtest_writeb(i2c->qts, s->addr + I2CR_ADDR, data);
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    status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
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    g_assert((status & I2SR_IBB) == 0);
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}
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static void imx_i2c_recv(I2CAdapter *i2c, uint8_t addr,
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                         uint8_t *buf, uint16_t len)
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{
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    IMXI2C *s = container_of(i2c, IMXI2C, parent);
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    uint8_t data;
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    uint8_t status;
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    uint16_t size = 0;
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    if (!len) {
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        return;
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    }
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    /* set the bus for write */
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    data = I2CR_IEN |
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           I2CR_IIEN |
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           I2CR_MSTA |
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           I2CR_MTX |
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           I2CR_TXAK;
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    qtest_writeb(i2c->qts, s->addr + I2CR_ADDR, data);
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    status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
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    g_assert((status & I2SR_IBB) != 0);
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    /* set the slave address */
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    imx_i2c_set_slave_addr(s, addr, IMX_I2C_READ);
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    status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
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    g_assert((status & I2SR_IIF) != 0);
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    g_assert((status & I2SR_RXAK) == 0);
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    /* ack the interrupt */
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    qtest_writeb(i2c->qts, s->addr + I2SR_ADDR, 0);
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    status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
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    g_assert((status & I2SR_IIF) == 0);
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    /* set the bus for read */
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    data &= ~I2CR_MTX;
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    /* if only one byte don't ack */
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    if (len != 1) {
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        data &= ~I2CR_TXAK;
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    }
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    qtest_writeb(i2c->qts, s->addr + I2CR_ADDR, data);
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    status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
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    g_assert((status & I2SR_IBB) != 0);
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    /* dummy read */
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    qtest_readb(i2c->qts, s->addr + I2DR_ADDR);
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    status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
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    g_assert((status & I2SR_IIF) != 0);
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    /* ack the interrupt */
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    qtest_writeb(i2c->qts, s->addr + I2SR_ADDR, 0);
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    status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
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    g_assert((status & I2SR_IIF) == 0);
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    while (size < len) {
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        /* check we are still busy */
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        status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
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        g_assert((status & I2SR_IBB) != 0);
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        if (size == (len - 1)) {
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            /* stop the read transaction */
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            data &= ~(I2CR_MSTA | I2CR_MTX);
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        } else {
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            /* ack the data read */
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            data |= I2CR_TXAK;
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        }
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        qtest_writeb(i2c->qts, s->addr + I2CR_ADDR, data);
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        /* read the data */
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        buf[size] = qtest_readb(i2c->qts, s->addr + I2DR_ADDR);
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        if (size != (len - 1)) {
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            status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
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            g_assert((status & I2SR_IIF) != 0);
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            /* ack the interrupt */
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            qtest_writeb(i2c->qts, s->addr + I2SR_ADDR, 0);
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        }
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        status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
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        g_assert((status & I2SR_IIF) == 0);
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        size++;
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    }
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    status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
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    g_assert((status & I2SR_IBB) == 0);
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}
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static void *imx_i2c_get_driver(void *obj, const char *interface)
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{
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    IMXI2C *s = obj;
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    if (!g_strcmp0(interface, "i2c-bus")) {
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        return &s->parent;
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    }
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    fprintf(stderr, "%s not present in imx-i2c\n", interface);
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    g_assert_not_reached();
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}
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void imx_i2c_init(IMXI2C *s, QTestState *qts, uint64_t addr)
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{
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    s->addr = addr;
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    s->obj.get_driver = imx_i2c_get_driver;
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    s->parent.send = imx_i2c_send;
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    s->parent.recv = imx_i2c_recv;
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    s->parent.qts = qts;
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}
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static void imx_i2c_register_nodes(void)
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{
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    qos_node_create_driver("imx.i2c", NULL);
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    qos_node_produces("imx.i2c", "i2c-bus");
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}
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libqos_init(imx_i2c_register_nodes);
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