 aeaf7bb5aa
			
		
	
	
		aeaf7bb5aa
		
	
	
	
	
		
			
			Remove the OMAP2 specific code from omap_uart.c. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240903160751.4100218-40-peter.maydell@linaro.org
		
			
				
	
	
		
			66 lines
		
	
	
		
			1.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			66 lines
		
	
	
		
			1.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * TI OMAP processors UART emulation.
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|  *
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|  * Copyright (C) 2006-2008 Andrzej Zaborowski  <balrog@zabor.org>
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|  * Copyright (C) 2007-2009 Nokia Corporation
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|  *
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|  * This program is free software; you can redistribute it and/or
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|  * modify it under the terms of the GNU General Public License as
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|  * published by the Free Software Foundation; either version 2 or
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|  * (at your option) version 3 of the License.
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|  *
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|  * This program is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  * GNU General Public License for more details.
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|  *
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|  * You should have received a copy of the GNU General Public License along
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|  * with this program; if not, see <http://www.gnu.org/licenses/>.
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|  */
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| #include "qemu/osdep.h"
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| #include "chardev/char.h"
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| #include "hw/arm/omap.h"
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| #include "hw/char/serial.h"
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| #include "exec/address-spaces.h"
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| 
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| /* UARTs */
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| struct omap_uart_s {
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|     MemoryRegion iomem;
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|     hwaddr base;
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|     SerialMM *serial; /* TODO */
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|     omap_clk fclk;
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|     qemu_irq irq;
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| 
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|     uint8_t eblr;
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|     uint8_t syscontrol;
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|     uint8_t wkup;
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|     uint8_t cfps;
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|     uint8_t clksel;
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| };
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| 
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| void omap_uart_reset(struct omap_uart_s *s)
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| {
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|     s->eblr = 0x00;
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|     s->syscontrol = 0;
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|     s->wkup = 0x3f;
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|     s->cfps = 0x69;
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|     s->clksel = 0;
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| }
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| 
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| struct omap_uart_s *omap_uart_init(hwaddr base,
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|                 qemu_irq irq, omap_clk fclk, omap_clk iclk,
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|                 qemu_irq txdma, qemu_irq rxdma,
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|                 const char *label, Chardev *chr)
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| {
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|     struct omap_uart_s *s = g_new0(struct omap_uart_s, 1);
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| 
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|     s->base = base;
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|     s->fclk = fclk;
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|     s->irq = irq;
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|     s->serial = serial_mm_init(get_system_memory(), base, 2, irq,
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|                                omap_clk_getrate(fclk) / 16,
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|                                chr ?: qemu_chr_new(label, "null", NULL),
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|                                DEVICE_NATIVE_ENDIAN);
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|     return s;
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| }
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