This converts existing DECLARE_INSTANCE_CHECKER usage to OBJECT_DECLARE_SIMPLE_TYPE when possible. $ ./scripts/codeconverter/converter.py -i \ --pattern=AddObjectDeclareSimpleType $(git grep -l '' -- '*.[ch]') Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Acked-by: Paul Durrant <paul@xen.org> Message-Id: <20200916182519.415636-6-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
		
			
				
	
	
		
			57 lines
		
	
	
		
			1.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			57 lines
		
	
	
		
			1.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * i.MX31 Vectored Interrupt Controller
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 *
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 * Note this is NOT the PL192 provided by ARM, but
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 * a custom implementation by Freescale.
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 *
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 * Copyright (c) 2008 OKL
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 * Copyright (c) 2011 NICTA Pty Ltd
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 * Originally written by Hans Jiang
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 * Updated by Jean-Christophe Dubois <jcd@tribudubois.net>
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 *
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 * This code is licensed under the GPL version 2 or later.  See
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 * the COPYING file in the top-level directory.
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 *
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 * TODO: implement vectors.
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 */
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#ifndef IMX_AVIC_H
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#define IMX_AVIC_H
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#include "hw/sysbus.h"
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#include "qom/object.h"
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#define TYPE_IMX_AVIC "imx.avic"
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OBJECT_DECLARE_SIMPLE_TYPE(IMXAVICState, IMX_AVIC)
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#define IMX_AVIC_NUM_IRQS 64
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/* Interrupt Control Bits */
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#define ABFLAG (1<<25)
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#define ABFEN  (1<<24)
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#define NIDIS  (1<<22) /* Normal Interrupt disable */
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#define FIDIS  (1<<21) /* Fast interrupt disable */
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#define NIAD   (1<<20) /* Normal Interrupt Arbiter Rise ARM level */
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#define FIAD   (1<<19) /* Fast Interrupt Arbiter Rise ARM level */
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#define NM     (1<<18) /* Normal interrupt mode */
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#define PRIO_PER_WORD (sizeof(uint32_t) * 8 / 4)
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#define PRIO_WORDS (IMX_AVIC_NUM_IRQS/PRIO_PER_WORD)
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struct IMXAVICState {
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    /*< private >*/
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    SysBusDevice parent_obj;
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    /*< public >*/
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    MemoryRegion iomem;
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    uint64_t pending;
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    uint64_t enabled;
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    uint64_t is_fiq;
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    uint32_t intcntl;
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    uint32_t intmask;
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    qemu_irq irq;
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    qemu_irq fiq;
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    uint32_t prio[PRIO_WORDS]; /* Priorities are 4-bits each */
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};
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#endif /* IMX_AVIC_H */
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